Frank Sever

Array ( [id] => 18599271 [patent_doc_number] => 20230274071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => GENERATING ROUTES FOR AN INTEGRATED CIRCUIT DESIGN WITH NON-PREFERRED DIRECTION CURVILINEAR WIRING [patent_app_type] => utility [patent_app_number] => 18/110336 [patent_app_country] => US [patent_app_date] => 2023-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22354 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18110336 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18599267 [patent_doc_number] => 20230274067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => USING PIXEL-BASED DEFINITION OF AN INTEGRATED CIRCUIT DESIGN TO PERFORM MACHINE-TRAINED ROUTING [patent_app_type] => utility [patent_app_number] => 18/110348 [patent_app_country] => US [patent_app_date] => 2023-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22354 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18110348 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18750483 [patent_doc_number] => 11809797 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-11-07 [patent_title] => Systems and methods of predictive manufacturing of three-dimensional, multi-planar semiconductors [patent_app_type] => utility [patent_app_number] => 18/098140 [patent_app_country] => US [patent_app_date] => 2023-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6848 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18098140 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19029193 [patent_doc_number] => 11928554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Comparing Rabi oscillation stimulations [patent_app_type] => utility [patent_app_number] => 18/098011 [patent_app_country] => US [patent_app_date] => 2023-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4974 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18098011 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18471674 [patent_doc_number] => 20230205960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => DESIGN FOR TESTABILITY CIRCUITRY PLACEMENT WITHIN AN INTEGRATED CIRCUIT DESIGN [patent_app_type] => utility [patent_app_number] => 18/090584 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090584 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18756347 [patent_doc_number] => 20230359796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => DETERMINING AGING EFFECTS FOR A CIRCUIT DESIGN [patent_app_type] => utility [patent_app_number] => 18/062773 [patent_app_country] => US [patent_app_date] => 2022-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18062773 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19653388 [patent_doc_number] => 12175179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Assessing performance of a hardware design using formal evaluation logic [patent_app_type] => utility [patent_app_number] => 18/076231 [patent_app_country] => US [patent_app_date] => 2022-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13656 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18076231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18281767 [patent_doc_number] => 20230097239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => WIRELESS MOBILE BATTERY [patent_app_type] => utility [patent_app_number] => 18/075047 [patent_app_country] => US [patent_app_date] => 2022-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18075047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18407888 [patent_doc_number] => 20230169241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => DEEP LEARNING-ENABLED INVERSE DESIGN OF MM-WAVE IMPEDANCE MATCHING CIRCUITS AND POWER AMPLIFIERS [patent_app_type] => utility [patent_app_number] => 18/073482 [patent_app_country] => US [patent_app_date] => 2022-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18073482 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19187328 [patent_doc_number] => 20240166241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => SAFETY AND PERFORMANCE FOR LOGIC DESIGN IN AUTONOMOUS VEHICLES [patent_app_type] => utility [patent_app_number] => 18/058009 [patent_app_country] => US [patent_app_date] => 2022-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4663 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18058009 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18942167 [patent_doc_number] => 20240037306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => STATIC TIMING ANALYSIS METHOD AND STATIC TIMING ANALYSIS SYSTEM [patent_app_type] => utility [patent_app_number] => 17/990799 [patent_app_country] => US [patent_app_date] => 2022-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17990799 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19174844 [patent_doc_number] => 20240160818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => METHOD FOR FAULT DETECTION IN SAFETY MECHANISMS [patent_app_type] => utility [patent_app_number] => 17/985735 [patent_app_country] => US [patent_app_date] => 2022-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17985735 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20610254 [patent_doc_number] => 12585856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Techniques for generating designs of circuits that include buffers using machine learning [patent_app_type] => utility [patent_app_number] => 17/982364 [patent_app_country] => US [patent_app_date] => 2022-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 6064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17982364 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19303922 [patent_doc_number] => 20240232502 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => ENHANCED ARTIFICIAL INTELLIGENCE FOR PERFORMANCE VALIDATION OF CORE INTEGRAETED CIRCUIT FEATURES [patent_app_type] => utility [patent_app_number] => 17/969891 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17969891 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19303922 [patent_doc_number] => 20240232502 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => ENHANCED ARTIFICIAL INTELLIGENCE FOR PERFORMANCE VALIDATION OF CORE INTEGRAETED CIRCUIT FEATURES [patent_app_type] => utility [patent_app_number] => 17/969891 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17969891 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18325662 [patent_doc_number] => 20230123790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => METHOD, SYSTEM AND EQUIPMENT FOR VEGETATION RESTORATION OR REHABILITATION OF SIMULATING NATURAL ECOSYSTEM BASED ON MACHINE LEARNING [patent_app_type] => utility [patent_app_number] => 17/967907 [patent_app_country] => US [patent_app_date] => 2022-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17967907 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19538553 [patent_doc_number] => 12131106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Layout method and apparatus based on genetic algorithm [patent_app_type] => utility [patent_app_number] => 18/697746 [patent_app_country] => US [patent_app_date] => 2022-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 11622 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 843 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18697746 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19538557 [patent_doc_number] => 12131110 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Apparatus and method for advanced macro clock skewing [patent_app_type] => utility [patent_app_number] => 17/963080 [patent_app_country] => US [patent_app_date] => 2022-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17963080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19329150 [patent_doc_number] => 12046844 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Liquid-cooled charging system for a vehicle [patent_app_type] => utility [patent_app_number] => 17/962873 [patent_app_country] => US [patent_app_date] => 2022-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17962873 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19639065 [patent_doc_number] => 12169673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Toffoli gate preparation for a quantum hardware system comprising hybrid acoustic-electrical qubits [patent_app_type] => utility [patent_app_number] => 18/045102 [patent_app_country] => US [patent_app_date] => 2022-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 45 [patent_no_of_words] => 26566 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045102 [rel_patent_id] =>[rel_patent_doc_number] =>)