Search

Fred M. Teskin

Examiner (ID: 1962, Phone: (571)272-1116 , Office: P/1762 )

Most Active Art Unit
1762
Art Unit(s)
1505, 1713, 1796, 2899, 1762
Total Applications
3798
Issued Applications
3195
Pending Applications
156
Abandoned Applications
473

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18095672 [patent_doc_number] => 20220414013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => DYNAMICALLY COALESCING ATOMIC MEMORY OPERATIONS FOR MEMORY-LOCAL COMPUTING [patent_app_type] => utility [patent_app_number] => 17/361145 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361145 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361145
Dynamically coalescing atomic memory operations for memory-local computing Jun 27, 2021 Issued
Array ( [id] => 17757394 [patent_doc_number] => 11397686 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-26 [patent_title] => Store-to-load forwarding using physical address proxies to identify candidate set of store queue entries [patent_app_type] => utility [patent_app_number] => 17/351946 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 19747 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17351946 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/351946
Store-to-load forwarding using physical address proxies to identify candidate set of store queue entries Jun 17, 2021 Issued
Array ( [id] => 17260790 [patent_doc_number] => 20210373775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => DATA DEDUPLICATION CACHE COMPRISING SOLID STATE DRIVE STORAGE AND THE LIKE [patent_app_type] => utility [patent_app_number] => 17/346998 [patent_app_country] => US [patent_app_date] => 2021-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8723 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17346998 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/346998
DATA DEDUPLICATION CACHE COMPRISING SOLID STATE DRIVE STORAGE AND THE LIKE Jun 13, 2021 Abandoned
Array ( [id] => 18119084 [patent_doc_number] => 11550477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Processing host write transactions using a non-volatile memory express controller memory manager [patent_app_type] => utility [patent_app_number] => 17/318259 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4986 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17318259 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/318259
Processing host write transactions using a non-volatile memory express controller memory manager May 11, 2021 Issued
Array ( [id] => 17962244 [patent_doc_number] => 20220342825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => System and Method for Lockless Destaging of Metadata Pages [patent_app_type] => utility [patent_app_number] => 17/237359 [patent_app_country] => US [patent_app_date] => 2021-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17237359 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/237359
System and method for lockless destaging of metadata pages Apr 21, 2021 Issued
Array ( [id] => 17729629 [patent_doc_number] => 11386019 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-12 [patent_title] => Data protection method and storage device [patent_app_type] => utility [patent_app_number] => 17/223062 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2596 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17223062 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/223062
Data protection method and storage device Apr 5, 2021 Issued
Array ( [id] => 18154881 [patent_doc_number] => 11567860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Memory system for updating mapping information [patent_app_type] => utility [patent_app_number] => 17/217242 [patent_app_country] => US [patent_app_date] => 2021-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 30 [patent_no_of_words] => 17103 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17217242 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/217242
Memory system for updating mapping information Mar 29, 2021 Issued
Array ( [id] => 18130265 [patent_doc_number] => 11556475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Power optimized prefetching in set-associative translation lookaside buffer structure [patent_app_type] => utility [patent_app_number] => 17/215287 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7643 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17215287 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/215287
Power optimized prefetching in set-associative translation lookaside buffer structure Mar 28, 2021 Issued
Array ( [id] => 16950088 [patent_doc_number] => 20210208780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => NON-DETERMINISTIC MEMORY PROTOCOL [patent_app_type] => utility [patent_app_number] => 17/212390 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7148 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212390 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212390
Non-deterministic memory protocol Mar 24, 2021 Issued
Array ( [id] => 18577656 [patent_doc_number] => 11734188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Unified translation miss queue for multiple address translation modes [patent_app_type] => utility [patent_app_number] => 17/199315 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8870 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199315 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/199315
Unified translation miss queue for multiple address translation modes Mar 10, 2021 Issued
Array ( [id] => 18119096 [patent_doc_number] => 11550489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-10 [patent_title] => Storage system and processing migration method [patent_app_type] => utility [patent_app_number] => 17/194743 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 8525 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17194743 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/194743
Storage system and processing migration method Mar 7, 2021 Issued
Array ( [id] => 17802104 [patent_doc_number] => 11416405 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-16 [patent_title] => System and method for mapping memory addresses to locations in set-associative caches [patent_app_type] => utility [patent_app_number] => 17/169079 [patent_app_country] => US [patent_app_date] => 2021-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8671 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17169079 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/169079
System and method for mapping memory addresses to locations in set-associative caches Feb 4, 2021 Issued
Array ( [id] => 16849077 [patent_doc_number] => 20210149822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => Memory Interface Between Physical and Virtual Address Spaces [patent_app_type] => utility [patent_app_number] => 17/161341 [patent_app_country] => US [patent_app_date] => 2021-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17161341 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/161341
Memory interface between physical and virtual address spaces Jan 27, 2021 Issued
Array ( [id] => 18387076 [patent_doc_number] => 11657865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Dynamic memory refresh interval to reduce bandwidth penalty [patent_app_type] => utility [patent_app_number] => 17/149709 [patent_app_country] => US [patent_app_date] => 2021-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4872 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17149709 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/149709
Dynamic memory refresh interval to reduce bandwidth penalty Jan 13, 2021 Issued
Array ( [id] => 16780261 [patent_doc_number] => 20210117340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => CRYPTOGRAPHIC COMPUTING WITH DISAGGREGATED MEMORY [patent_app_type] => utility [patent_app_number] => 17/134332 [patent_app_country] => US [patent_app_date] => 2020-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134332 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/134332
Cryptographic computing with disaggregated memory Dec 25, 2020 Issued
Array ( [id] => 16887597 [patent_doc_number] => 20210173794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => SECURE ADDRESS TRANSLATION SERVICES USING BUNDLE ACCESS CONTROL [patent_app_type] => utility [patent_app_number] => 17/131974 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6869 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131974 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/131974
Secure address translation services using bundle access control Dec 22, 2020 Issued
Array ( [id] => 17999662 [patent_doc_number] => 11500769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Valid data identification for garbage collection [patent_app_type] => utility [patent_app_number] => 17/129373 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 14447 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17129373 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/129373
Valid data identification for garbage collection Dec 20, 2020 Issued
Array ( [id] => 19015086 [patent_doc_number] => 11922018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Storage system and storage control method including dimension setting information representing attribute for each of data dimensions of multidimensional dataset [patent_app_type] => utility [patent_app_number] => 17/761782 [patent_app_country] => US [patent_app_date] => 2020-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 13995 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17761782 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/761782
Storage system and storage control method including dimension setting information representing attribute for each of data dimensions of multidimensional dataset Dec 17, 2020 Issued
Array ( [id] => 17786546 [patent_doc_number] => 11409670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Managing lock coordinator rebalance in distributed file systems [patent_app_type] => utility [patent_app_number] => 17/124694 [patent_app_country] => US [patent_app_date] => 2020-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 9341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17124694 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/124694
Managing lock coordinator rebalance in distributed file systems Dec 16, 2020 Issued
Array ( [id] => 17157913 [patent_doc_number] => 20210318964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => Caching System for Eventually Consistent Services [patent_app_type] => utility [patent_app_number] => 17/124201 [patent_app_country] => US [patent_app_date] => 2020-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16417 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -34 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17124201 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/124201
Caching system for eventually consistent services Dec 15, 2020 Issued
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