Search

Fred M. Teskin

Examiner (ID: 1962, Phone: (571)272-1116 , Office: P/1762 )

Most Active Art Unit
1762
Art Unit(s)
1505, 1713, 1796, 2899, 1762
Total Applications
3798
Issued Applications
3195
Pending Applications
156
Abandoned Applications
473

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20819941 [patent_doc_number] => 12675410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-07 [patent_title] => System and method for monitoring and managing cache data to optimize use and storage of device memory [patent_app_type] => utility [patent_app_number] => 18/591901 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1218 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18591901 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/591901
SYSTEM AND METHOD FOR MONITORING AND MANAGING CACHE DATA TO OPTIMIZE USE AND STORAGE OF DEVICE MEMORY Feb 28, 2024 Issued
Array ( [id] => 19949912 [patent_doc_number] => 12321274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Recall pending cache line eviction [patent_app_type] => utility [patent_app_number] => 18/591718 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7702 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18591718 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/591718
Recall pending cache line eviction Feb 28, 2024 Issued
Array ( [id] => 19899136 [patent_doc_number] => 12277057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Byte-addressable device and computing system including same [patent_app_type] => utility [patent_app_number] => 18/585008 [patent_app_country] => US [patent_app_date] => 2024-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4642 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18585008 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/585008
Byte-addressable device and computing system including same Feb 21, 2024 Issued
Array ( [id] => 19739757 [patent_doc_number] => 12216587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Packet cache system and method [patent_app_type] => utility [patent_app_number] => 18/583341 [patent_app_country] => US [patent_app_date] => 2024-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18583341 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/583341
Packet cache system and method Feb 20, 2024 Issued
Array ( [id] => 20344895 [patent_doc_number] => 12468627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Address mapping table compression [patent_app_type] => utility [patent_app_number] => 18/443005 [patent_app_country] => US [patent_app_date] => 2024-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7367 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443005 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443005
Address mapping table compression Feb 14, 2024 Issued
Array ( [id] => 19856982 [patent_doc_number] => 12259818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Flash memory controller and data programming method [patent_app_type] => utility [patent_app_number] => 18/432096 [patent_app_country] => US [patent_app_date] => 2024-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 8327 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18432096 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/432096
Flash memory controller and data programming method Feb 4, 2024 Issued
Array ( [id] => 20174653 [patent_doc_number] => 12393400 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-08-19 [patent_title] => Block matching between first data and second data [patent_app_type] => utility [patent_app_number] => 18/431707 [patent_app_country] => US [patent_app_date] => 2024-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 9384 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18431707 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/431707
Block matching between first data and second data Feb 1, 2024 Issued
Array ( [id] => 20138126 [patent_doc_number] => 20250245170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => DYNAMIC UPDATING OF CONTENT ADDRESSABLE ASSOCIATIVE MEMORIES FOR LARGE LANGUAGE MODELS [patent_app_type] => utility [patent_app_number] => 18/428422 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428422 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/428422
Dynamic updating of content addressable associative memories for large language models Jan 30, 2024 Issued
Array ( [id] => 20123348 [patent_doc_number] => 20250238379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => CANCELLING CACHE ALLOCATION TRANSACTIONS [patent_app_type] => utility [patent_app_number] => 18/418689 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18418689 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/418689
Cancelling cache allocation transactions Jan 21, 2024 Issued
Array ( [id] => 19159678 [patent_doc_number] => 20240152385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => CONTROLLER WITH CACHING AND NON-CACHING MODES [patent_app_type] => utility [patent_app_number] => 18/411763 [patent_app_country] => US [patent_app_date] => 2024-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17731 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18411763 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/411763
Controller with caching and non-caching modes Jan 11, 2024 Issued
Array ( [id] => 20101948 [patent_doc_number] => 20250231884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => USING SPECIAL DATA STORAGE PARAMETERS WHEN STORING COLD STREAM DATA IN A DATA STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/410238 [patent_app_country] => US [patent_app_date] => 2024-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18410238 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/410238
Using special data storage parameters when storing cold stream data in a data storage device Jan 10, 2024 Issued
Array ( [id] => 19506517 [patent_doc_number] => 12117937 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-10-15 [patent_title] => Using physical address proxies to handle synonyms when writing store data to a virtually-indexed cache [patent_app_type] => utility [patent_app_number] => 18/407071 [patent_app_country] => US [patent_app_date] => 2024-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 63 [patent_no_of_words] => 56910 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407071 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/407071
Using physical address proxies to handle synonyms when writing store data to a virtually-indexed cache Jan 7, 2024 Issued
Array ( [id] => 20145688 [patent_doc_number] => 12380031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Method and apparatus for designing cache memory structure based on artificial intelligence [patent_app_type] => utility [patent_app_number] => 18/399517 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3395 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399517 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399517
Method and apparatus for designing cache memory structure based on artificial intelligence Dec 27, 2023 Issued
Array ( [id] => 20061738 [patent_doc_number] => 20250199960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => Smart Cache Cleaner [patent_app_type] => utility [patent_app_number] => 18/543352 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1013 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18543352 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/543352
Smart cache cleaner Dec 17, 2023 Issued
Array ( [id] => 19725895 [patent_doc_number] => 20250028646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => SYSTEMS AND METHODS FOR CACHE ALLOCATION [patent_app_type] => utility [patent_app_number] => 18/524412 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7661 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524412 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/524412
Systems and methods for cache allocation Nov 29, 2023 Issued
Array ( [id] => 20242913 [patent_doc_number] => 12423233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Order enforcement for delegable memory accesses [patent_app_type] => utility [patent_app_number] => 18/523249 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 22558 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18523249 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/523249
Order enforcement for delegable memory accesses Nov 28, 2023 Issued
Array ( [id] => 19167216 [patent_doc_number] => 11983121 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-05-14 [patent_title] => Cache memory device and method for implementing cache scheduling using same [patent_app_type] => utility [patent_app_number] => 18/510232 [patent_app_country] => US [patent_app_date] => 2023-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 8780 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18510232 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/510232
Cache memory device and method for implementing cache scheduling using same Nov 14, 2023 Issued
Array ( [id] => 20160117 [patent_doc_number] => 12386745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Dynamic single-level cell write through in memory devices [patent_app_type] => utility [patent_app_number] => 18/388782 [patent_app_country] => US [patent_app_date] => 2023-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5061 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18388782 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/388782
Dynamic single-level cell write through in memory devices Nov 9, 2023 Issued
Array ( [id] => 18989819 [patent_doc_number] => 20240061788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => TLB ACCESS MONITORING [patent_app_type] => utility [patent_app_number] => 18/386911 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7324 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18386911 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/386911
Data temperature associated with TLB flush request Nov 2, 2023 Issued
Array ( [id] => 19021874 [patent_doc_number] => 20240078045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => HARDWARE QUEUE HANDLING SYSTEM, METHOD, SOLID STATE DRIVE CONTROLLER, AND SOLID-STATE DRIVE [patent_app_type] => utility [patent_app_number] => 18/385176 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18385176 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/385176
Hardware queue handling system, method, solid state drive controller, and solid-state drive Oct 29, 2023 Issued
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