
Fred Tzeng
Examiner (ID: 5378)
| Most Active Art Unit | 2627 |
| Art Unit(s) | 2186, 2686, 2627, 2752, 2651, 2695, 2625 |
| Total Applications | 1789 |
| Issued Applications | 1607 |
| Pending Applications | 63 |
| Abandoned Applications | 139 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1223288
[patent_doc_number] => 06704156
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-09
[patent_title] => 'Self-writing of servo patterns in a disk drive using a printed reference pattern'
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[patent_app_number] => 09/494826
[patent_app_country] => US
[patent_app_date] => 2000-01-31
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[pdf_file] => patents/06/704/06704156.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/494826 | Self-writing of servo patterns in a disk drive using a printed reference pattern | Jan 30, 2000 | Issued |
Array
(
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[patent_doc_number] => 06496915
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[patent_kind] => B1
[patent_issue_date] => 2002-12-17
[patent_title] => 'Apparatus and method for reducing power consumption in an electronic data storage system'
[patent_app_type] => B1
[patent_app_number] => 09/476590
[patent_app_country] => US
[patent_app_date] => 1999-12-31
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Array
(
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[patent_doc_number] => 06397297
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[patent_issue_date] => 2002-05-28
[patent_title] => 'Dual cache with multiple interconnection operation modes'
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[patent_app_number] => 09/474782
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[patent_app_date] => 1999-12-30
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Array
(
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[patent_doc_number] => 06446156
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[patent_issue_date] => 2002-09-03
[patent_title] => 'Proposal of capacity tuning in the production process of storage disc drives'
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[patent_app_date] => 1999-12-30
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Array
(
[id] => 1406615
[patent_doc_number] => 06560675
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[patent_issue_date] => 2003-05-06
[patent_title] => 'Method for controlling concurrent cache replace and return across an asynchronous interface'
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[patent_app_number] => 09/476293
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Array
(
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[patent_doc_number] => 06412050
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[patent_issue_date] => 2002-06-25
[patent_title] => 'Memory record update filtering'
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Array
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[patent_doc_number] => 06516384
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[patent_title] => 'Method and apparatus to perform a round robin and locking cache replacement scheme'
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[pdf_file] => patents/06/516/06516384.pdf
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Array
(
[id] => 1418737
[patent_doc_number] => 06546462
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[patent_issue_date] => 2003-04-08
[patent_title] => 'CLFLUSH micro-architectural implementation method and system'
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Array
(
[id] => 1248874
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[patent_title] => 'MFENCE and LFENCE micro-architectural implementation method and system'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/475363 | MFENCE and LFENCE micro-architectural implementation method and system | Dec 29, 1999 | Issued |
Array
(
[id] => 1567455
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[patent_title] => 'Correlated address prediction'
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[patent_app_number] => 09/475063
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Array
(
[id] => 1584839
[patent_doc_number] => 06449702
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[patent_title] => 'Memory bandwidth utilization through multiple priority request policy for isochronous data streams'
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Array
(
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Array
(
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Array
(
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Array
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Array
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Array
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Array
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Array
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