Fritz Alphonse

Array ( [id] => 6843236 [patent_doc_number] => 20030148583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Non-volatile semiconductor memory and method of making same, and semiconductor device and method of making device' [patent_app_type] => new [patent_app_number] => 10/374433 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 84 [patent_figures_cnt] => 84 [patent_no_of_words] => 33000 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20030148583.pdf [firstpage_image] =>[orig_patent_app_number] => 10374433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1277594 [patent_doc_number] => 06645786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-11 [patent_title] => 'Integrated circuit device having a built-in thermoelectric cooling mechanism' [patent_app_type] => B2 [patent_app_number] => 10/374115 [patent_app_country] => US [patent_app_date] => 2003-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2142 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/645/06645786.pdf [firstpage_image] =>[orig_patent_app_number] => 10374115 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1202688 [patent_doc_number] => 06720234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-13 [patent_title] => 'Semiconductor integrated circuit device and method of manufacturing involving the scale-down width of shallow groove isolation using round processing' [patent_app_type] => B2 [patent_app_number] => 10/366423 [patent_app_country] => US [patent_app_date] => 2003-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 79 [patent_no_of_words] => 14838 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/720/06720234.pdf [firstpage_image] =>[orig_patent_app_number] => 10366423 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7234953 [patent_doc_number] => 20040157359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Method for planarizing bumped die' [patent_app_type] => new [patent_app_number] => 10/359818 [patent_app_country] => US [patent_app_date] => 2003-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2210 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20040157359.pdf [firstpage_image] =>[orig_patent_app_number] => 10359818 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7309212 [patent_doc_number] => 20040142518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Use of fluorine implantation to form a charge balanced nitrided gate dielectric layer' [patent_app_type] => new [patent_app_number] => 10/351158 [patent_app_country] => US [patent_app_date] => 2003-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2565 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20040142518.pdf [firstpage_image] =>[orig_patent_app_number] => 10351158 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6659665 [patent_doc_number] => 20030134456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-17 [patent_title] => 'Semiconductor fuses, methods of using the same, methods of making the same, and semiconductor devices containing the same' [patent_app_type] => new [patent_app_number] => 10/331033 [patent_app_country] => US [patent_app_date] => 2002-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4150 [patent_no_of_claims] => 95 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0134/20030134456.pdf [firstpage_image] =>[orig_patent_app_number] => 10331033 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1205654 [patent_doc_number] => 06716735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Method for forming metal lines of semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/327858 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 1642 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/716/06716735.pdf [firstpage_image] =>[orig_patent_app_number] => 10327858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1053220 [patent_doc_number] => 06858549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Method for forming wiring structure' [patent_app_type] => utility [patent_app_number] => 10/328178 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 7929 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/858/06858549.pdf [firstpage_image] =>[orig_patent_app_number] => 10328178 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7675092 [patent_doc_number] => 20040127026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Methods for improving sheet resistance of silicide layer after removal of etch stop layer' [patent_app_type] => new [patent_app_number] => 10/329598 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5932 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20040127026.pdf [firstpage_image] =>[orig_patent_app_number] => 10329598 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7471461 [patent_doc_number] => 20040121542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'SiN ROM AND METHOD OF FABRICATING THE SAME' [patent_app_type] => new [patent_app_number] => 10/248165 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3976 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20040121542.pdf [firstpage_image] =>[orig_patent_app_number] => 10248165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1177354 [patent_doc_number] => 06743701 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Method for the formation of active area utilizing reverse trench isolation' [patent_app_type] => B1 [patent_app_number] => 10/324698 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2077 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/743/06743701.pdf [firstpage_image] =>[orig_patent_app_number] => 10324698 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1071840 [patent_doc_number] => 06841423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Methods for formation of recessed encapsulated microelectronic devices' [patent_app_type] => utility [patent_app_number] => 10/320892 [patent_app_country] => US [patent_app_date] => 2002-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3364 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841423.pdf [firstpage_image] =>[orig_patent_app_number] => 10320892 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1101677 [patent_doc_number] => 06815305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-09 [patent_title] => 'Method for fabricating BICMOS semiconductor devices' [patent_app_type] => B2 [patent_app_number] => 10/318158 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2375 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/815/06815305.pdf [firstpage_image] =>[orig_patent_app_number] => 10318158 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1130450 [patent_doc_number] => 06787440 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-07 [patent_title] => 'Method for making a semiconductor device having an ultra-thin high-k gate dielectric' [patent_app_type] => B2 [patent_app_number] => 10/315268 [patent_app_country] => US [patent_app_date] => 2002-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2437 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/787/06787440.pdf [firstpage_image] =>[orig_patent_app_number] => 10315268 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7634834 [patent_doc_number] => 06656784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-02 [patent_title] => 'Method for fabricating capacitors' [patent_app_type] => B2 [patent_app_number] => 10/315543 [patent_app_country] => US [patent_app_date] => 2002-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3478 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 10 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/656/06656784.pdf [firstpage_image] =>[orig_patent_app_number] => 10315543 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1212755 [patent_doc_number] => 06709947 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-23 [patent_title] => 'Method of area enhancement in capacitor plates' [patent_app_type] => B1 [patent_app_number] => 10/314548 [patent_app_country] => US [patent_app_date] => 2002-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/709/06709947.pdf [firstpage_image] =>[orig_patent_app_number] => 10314548 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6813716 [patent_doc_number] => 20030073266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Semiconductor device and a method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/302848 [patent_app_country] => US [patent_app_date] => 2002-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 4182 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20030073266.pdf [firstpage_image] =>[orig_patent_app_number] => 10302848 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1324583 [patent_doc_number] => 06602807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-05 [patent_title] => 'Use of linear injectors to deposit uniform selective ozone TEOS oxide film by pulsing reactants on and off' [patent_app_type] => B2 [patent_app_number] => 10/298867 [patent_app_country] => US [patent_app_date] => 2002-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5582 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/602/06602807.pdf [firstpage_image] =>[orig_patent_app_number] => 10298867 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6765760 [patent_doc_number] => 20030100160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-29 [patent_title] => 'Method for making self-registering non-lithographic transistors with ultrashort channel lengths' [patent_app_type] => new [patent_app_number] => 10/293488 [patent_app_country] => US [patent_app_date] => 2002-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3220 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 343 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20030100160.pdf [firstpage_image] =>[orig_patent_app_number] => 10293488 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6783092 [patent_doc_number] => 20030064539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Solid state imaging device, manufacturing method thereof, and solid state imaging apparatus' [patent_app_type] => new [patent_app_number] => 10/290363 [patent_app_country] => US [patent_app_date] => 2002-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 12791 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20030064539.pdf [firstpage_image] =>[orig_patent_app_number] => 10290363 [rel_patent_id] =>[rel_patent_doc_number] =>)