Search

Fritz Alphonse

Examiner (ID: 313, Phone: (571)272-3813 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2775, 2133, 2675
Total Applications
1754
Issued Applications
1609
Pending Applications
27
Abandoned Applications
125

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16844759 [patent_doc_number] => 11016846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Storage device using host memory and operating method thereof [patent_app_type] => utility [patent_app_number] => 16/533894 [patent_app_country] => US [patent_app_date] => 2019-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 11613 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16533894 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/533894
Storage device using host memory and operating method thereof Aug 6, 2019 Issued
Array ( [id] => 15505035 [patent_doc_number] => 20200052706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => APPARATUS INCLUDING SAFETY LOGIC [patent_app_type] => utility [patent_app_number] => 16/533420 [patent_app_country] => US [patent_app_date] => 2019-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9796 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16533420 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/533420
Apparatus including safety logic Aug 5, 2019 Issued
Array ( [id] => 15463685 [patent_doc_number] => 20200044667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => Method and Apparatus for Encoding Quasi-Cyclic Low-Density Parity Check Codes [patent_app_type] => utility [patent_app_number] => 16/530944 [patent_app_country] => US [patent_app_date] => 2019-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16530944 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/530944
Method and apparatus for encoding quasi-cyclic low-density parity check codes Aug 1, 2019 Issued
Array ( [id] => 16644341 [patent_doc_number] => 10922198 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-16 [patent_title] => Cloning failing memory devices in a dispersed storage network [patent_app_type] => utility [patent_app_number] => 16/530155 [patent_app_country] => US [patent_app_date] => 2019-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 8352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16530155 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/530155
Cloning failing memory devices in a dispersed storage network Aug 1, 2019 Issued
Array ( [id] => 16610045 [patent_doc_number] => 10911070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => Method and apparatus for decoding polar codes based on shared node [patent_app_type] => utility [patent_app_number] => 16/528967 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5179 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528967 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/528967
Method and apparatus for decoding polar codes based on shared node Jul 31, 2019 Issued
Array ( [id] => 15941121 [patent_doc_number] => 20200162194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => HIGH SPEED INTERCONNECT SYMBOL STREAM FORWARD ERROR-CORRECTION [patent_app_type] => utility [patent_app_number] => 16/524613 [patent_app_country] => US [patent_app_date] => 2019-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16524613 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/524613
High speed interconnect symbol stream forward error-correction Jul 28, 2019 Issued
Array ( [id] => 15094263 [patent_doc_number] => 20190341943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => DATA STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/517144 [patent_app_country] => US [patent_app_date] => 2019-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8337 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16517144 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/517144
Data storage device Jul 18, 2019 Issued
Array ( [id] => 16988469 [patent_doc_number] => 11075656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Bit error reduction of communication systems using error correction [patent_app_type] => utility [patent_app_number] => 16/512786 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 31593 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16512786 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/512786
Bit error reduction of communication systems using error correction Jul 15, 2019 Issued
Array ( [id] => 16881795 [patent_doc_number] => 11031959 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-08 [patent_title] => System and method for informational reduction [patent_app_type] => utility [patent_app_number] => 16/513447 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9732 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16513447 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/513447
System and method for informational reduction Jul 15, 2019 Issued
Array ( [id] => 16494381 [patent_doc_number] => 10860423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-08 [patent_title] => Method and apparatus for performing dynamic recovery management regarding redundant array of independent disks [patent_app_type] => utility [patent_app_number] => 16/513675 [patent_app_country] => US [patent_app_date] => 2019-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7074 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16513675 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/513675
Method and apparatus for performing dynamic recovery management regarding redundant array of independent disks Jul 15, 2019 Issued
Array ( [id] => 16638590 [patent_doc_number] => 10917112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Apparatus and methods for error detection coding [patent_app_type] => utility [patent_app_number] => 16/511180 [patent_app_country] => US [patent_app_date] => 2019-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 32 [patent_no_of_words] => 20290 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16511180 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/511180
Apparatus and methods for error detection coding Jul 14, 2019 Issued
Array ( [id] => 15047299 [patent_doc_number] => 20190334654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => METHOD FOR POLAR CODING AND APPARATUS [patent_app_type] => utility [patent_app_number] => 16/506765 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18028 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16506765 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/506765
Method for polar coding and apparatus Jul 8, 2019 Issued
Array ( [id] => 16651893 [patent_doc_number] => 10929068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Pre-caching data according to a current or predicted requester location [patent_app_type] => utility [patent_app_number] => 16/456633 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 8138 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456633 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456633
Pre-caching data according to a current or predicted requester location Jun 27, 2019 Issued
Array ( [id] => 15027697 [patent_doc_number] => 20190324853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => METHOD AND SYSTEM FOR IDENTIFYING ERASED MEMORY AREAS [patent_app_type] => utility [patent_app_number] => 16/455664 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7279 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455664 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455664
Method and system for identifying erased memory areas Jun 26, 2019 Issued
Array ( [id] => 15001359 [patent_doc_number] => 20190319637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => SYSTEM AND METHOD FOR DECODING ITERATIONS AND DYNAMIC SCALING [patent_app_type] => utility [patent_app_number] => 16/453882 [patent_app_country] => US [patent_app_date] => 2019-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16453882 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/453882
System and method for decoding iterations and dynamic scaling Jun 25, 2019 Issued
Array ( [id] => 16705546 [patent_doc_number] => 10955472 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-23 [patent_title] => Yield-oriented design-for-test in power-switchable cores [patent_app_type] => utility [patent_app_number] => 16/444917 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12392 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16444917 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/444917
Yield-oriented design-for-test in power-switchable cores Jun 17, 2019 Issued
Array ( [id] => 16819695 [patent_doc_number] => 11004532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Method and system for analyzing traffic data [patent_app_type] => utility [patent_app_number] => 16/445081 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8215 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445081 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/445081
Method and system for analyzing traffic data Jun 17, 2019 Issued
Array ( [id] => 16683327 [patent_doc_number] => 10942805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Error correcting circuit performing error correction on user data and error correcting method using the error correcting circuit [patent_app_type] => utility [patent_app_number] => 16/444056 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9112 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16444056 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/444056
Error correcting circuit performing error correction on user data and error correcting method using the error correcting circuit Jun 17, 2019 Issued
Array ( [id] => 14906019 [patent_doc_number] => 20190296775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/441719 [patent_app_country] => US [patent_app_date] => 2019-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16082 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16441719 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/441719
Memory system Jun 13, 2019 Issued
Array ( [id] => 16486240 [patent_doc_number] => 20200379845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => MANAGING SUPERPARITY STORAGE LOCATION USAGE AND COVERAGE [patent_app_type] => utility [patent_app_number] => 16/426773 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2971 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16426773 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/426773
Managing superparity storage location usage and coverage May 29, 2019 Issued
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