Search

Fritz Alphonse

Examiner (ID: 313, Phone: (571)272-3813 , Office: P/2112 )

Most Active Art Unit
2112
Art Unit(s)
2112, 2775, 2133, 2675
Total Applications
1754
Issued Applications
1609
Pending Applications
27
Abandoned Applications
125

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16133861 [patent_doc_number] => 10700709 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-30 [patent_title] => Linear block code decoding [patent_app_type] => utility [patent_app_number] => 15/965271 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 13742 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15965271 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/965271
Linear block code decoding Apr 26, 2018 Issued
Array ( [id] => 14605039 [patent_doc_number] => 10355719 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-16 [patent_title] => System and method for informational reduction [patent_app_type] => utility [patent_app_number] => 15/955354 [patent_app_country] => US [patent_app_date] => 2018-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9813 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15955354 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/955354
System and method for informational reduction Apr 16, 2018 Issued
Array ( [id] => 13361469 [patent_doc_number] => 20180232274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => GLOBAL ERROR RECOVERY SYSTEM [patent_app_type] => utility [patent_app_number] => 15/954535 [patent_app_country] => US [patent_app_date] => 2018-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15954535 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/954535
Global error recovery system Apr 15, 2018 Issued
Array ( [id] => 13560291 [patent_doc_number] => 20180331693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => PAYLOAD SIZE AMBIGUITY AND FALSE ALARM RATE REDUCTION FOR POLAR CODES [patent_app_type] => utility [patent_app_number] => 15/953239 [patent_app_country] => US [patent_app_date] => 2018-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33427 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -46 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15953239 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/953239
Payload size ambiguity and false alarm rate reduction for polar codes Apr 12, 2018 Issued
Array ( [id] => 16242276 [patent_doc_number] => 20200259510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => GCC DECODING AND POLAR CODE SUCCESSIVE-CANCELLATION LIST DECODING WITH DECOMPOSITION INTO CONCATENATED INNER AND OUTER CODES [patent_app_type] => utility [patent_app_number] => 16/642438 [patent_app_country] => US [patent_app_date] => 2018-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16642438 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/642438
GCC decoding and polar code successive-cancellation list decoding with decomposition into concatenated inner and outer codes Apr 9, 2018 Issued
Array ( [id] => 16242276 [patent_doc_number] => 20200259510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => GCC DECODING AND POLAR CODE SUCCESSIVE-CANCELLATION LIST DECODING WITH DECOMPOSITION INTO CONCATENATED INNER AND OUTER CODES [patent_app_type] => utility [patent_app_number] => 16/642438 [patent_app_country] => US [patent_app_date] => 2018-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16642438 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/642438
GCC decoding and polar code successive-cancellation list decoding with decomposition into concatenated inner and outer codes Apr 9, 2018 Issued
Array ( [id] => 13350899 [patent_doc_number] => 20180226989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => MULTIPLE LOW DENSITY PARITY CHECK (LDPC) BASE GRAPH DESIGN [patent_app_type] => utility [patent_app_number] => 15/943624 [patent_app_country] => US [patent_app_date] => 2018-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943624 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/943624
Multiple low density parity check (LDPC) base graph design Apr 1, 2018 Issued
Array ( [id] => 13472389 [patent_doc_number] => 20180287737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => APPARATUS AND METHOD FOR CHANNEL ENCODING/DECODING IN COMMUNICATION OR BROADCASTING SYSTEM [patent_app_type] => utility [patent_app_number] => 15/941559 [patent_app_country] => US [patent_app_date] => 2018-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24263 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15941559 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/941559
Apparatus and method for channel encoding/decoding in communication or broadcasting system Mar 29, 2018 Issued
Array ( [id] => 14026083 [patent_doc_number] => 20190075035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => Device Performance Monitoring [patent_app_type] => utility [patent_app_number] => 15/937259 [patent_app_country] => US [patent_app_date] => 2018-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15937259 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/937259
Device Performance Monitoring Mar 26, 2018 Abandoned
Array ( [id] => 15582127 [patent_doc_number] => 10581464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Encoder device, decoder device, and methods thereof [patent_app_type] => utility [patent_app_number] => 15/934361 [patent_app_country] => US [patent_app_date] => 2018-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6875 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15934361 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/934361
Encoder device, decoder device, and methods thereof Mar 22, 2018 Issued
Array ( [id] => 13580479 [patent_doc_number] => 20180341788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => LOGIC DEVICE FOR DETECTING FAULTS [patent_app_type] => utility [patent_app_number] => 15/920835 [patent_app_country] => US [patent_app_date] => 2018-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2914 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15920835 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/920835
Logic device for detecting faults Mar 13, 2018 Issued
Array ( [id] => 14493505 [patent_doc_number] => 10333557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Memory system [patent_app_type] => utility [patent_app_number] => 15/918212 [patent_app_country] => US [patent_app_date] => 2018-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 29 [patent_no_of_words] => 16065 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15918212 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/918212
Memory system Mar 11, 2018 Issued
Array ( [id] => 15820669 [patent_doc_number] => 10635514 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Storage device, host system, and information processing system [patent_app_type] => utility [patent_app_number] => 15/905804 [patent_app_country] => US [patent_app_date] => 2018-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 13541 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15905804 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/905804
Storage device, host system, and information processing system Feb 25, 2018 Issued
Array ( [id] => 14786425 [patent_doc_number] => 20190268110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => METHODS, SYSTEMS AND COMPUTER READABLE MEDIA FOR EVALUATING LINK OR COMPONENT QUALITY USING SYNTHETIC FORWARD ERROR CORRECTION (FEC) [patent_app_type] => utility [patent_app_number] => 15/905097 [patent_app_country] => US [patent_app_date] => 2018-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4783 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15905097 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/905097
Methods, systems and computer readable media for evaluating link or component quality using synthetic forward error correction (FEC) Feb 25, 2018 Issued
Array ( [id] => 14952809 [patent_doc_number] => 10437669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Apparatuses and methods for selective determination of data error repair [patent_app_type] => utility [patent_app_number] => 15/901949 [patent_app_country] => US [patent_app_date] => 2018-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 10204 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901949 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/901949
Apparatuses and methods for selective determination of data error repair Feb 21, 2018 Issued
Array ( [id] => 15820705 [patent_doc_number] => 10635532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Method of controlling error check and correction (ECC) of non-volatile memory device and memory system performing the same [patent_app_type] => utility [patent_app_number] => 15/901175 [patent_app_country] => US [patent_app_date] => 2018-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 39 [patent_no_of_words] => 9636 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901175 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/901175
Method of controlling error check and correction (ECC) of non-volatile memory device and memory system performing the same Feb 20, 2018 Issued
Array ( [id] => 15672513 [patent_doc_number] => 10600495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Parallel memory self-testing [patent_app_type] => utility [patent_app_number] => 15/891789 [patent_app_country] => US [patent_app_date] => 2018-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7237 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15891789 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/891789
Parallel memory self-testing Feb 7, 2018 Issued
Array ( [id] => 15674599 [patent_doc_number] => 10601545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => System and method for forward error correction [patent_app_type] => utility [patent_app_number] => 15/890746 [patent_app_country] => US [patent_app_date] => 2018-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 8074 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15890746 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/890746
System and method for forward error correction Feb 6, 2018 Issued
Array ( [id] => 16866515 [patent_doc_number] => 11025275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => LDPC code block segmentation [patent_app_type] => utility [patent_app_number] => 16/483091 [patent_app_country] => US [patent_app_date] => 2018-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 8684 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16483091 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/483091
LDPC code block segmentation Feb 5, 2018 Issued
Array ( [id] => 15516929 [patent_doc_number] => 10565051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => Accommodating variable page sizes in solid-state drives using customized error correction [patent_app_type] => utility [patent_app_number] => 15/889645 [patent_app_country] => US [patent_app_date] => 2018-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6891 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15889645 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/889645
Accommodating variable page sizes in solid-state drives using customized error correction Feb 5, 2018 Issued
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