Search

Gabriele E. Bugaisky

Examiner (ID: 14879)

Most Active Art Unit
1653
Art Unit(s)
1643, 1814, 1653, 1652, 1804, 2900, 2899, 1654, 1634, 1656, 1609
Total Applications
617
Issued Applications
349
Pending Applications
104
Abandoned Applications
164

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13111149 [patent_doc_number] => 10074232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-11 [patent_title] => Video switcher and touch router method for multi-layer displays [patent_app_type] => utility [patent_app_number] => 15/655731 [patent_app_country] => US [patent_app_date] => 2017-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 46 [patent_no_of_words] => 12817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15655731 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/655731
Video switcher and touch router method for multi-layer displays Jul 19, 2017 Issued
Array ( [id] => 12027087 [patent_doc_number] => 20170317185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'GATE STRUCTURE HAVING DESIGNED PROFILE' [patent_app_type] => utility [patent_app_number] => 15/650387 [patent_app_country] => US [patent_app_date] => 2017-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5391 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15650387 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/650387
Gate structure having designed profile Jul 13, 2017 Issued
Array ( [id] => 15332327 [patent_doc_number] => 20200006493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => SEMICONDUCTOR SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/319053 [patent_app_country] => US [patent_app_date] => 2017-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16319053 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/319053
Semiconductor substrate Jul 12, 2017 Issued
Array ( [id] => 12005516 [patent_doc_number] => 20170309671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'PIXEL CIRCUIT' [patent_app_type] => utility [patent_app_number] => 15/633587 [patent_app_country] => US [patent_app_date] => 2017-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10832 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15633587 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/633587
Pixel circuit Jun 25, 2017 Issued
Array ( [id] => 13799623 [patent_doc_number] => 20190013350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => DISPLAY PANEL AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/749271 [patent_app_country] => US [patent_app_date] => 2017-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15749271 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/749271
Display panel and manufacturing method thereof, display device Jun 20, 2017 Issued
Array ( [id] => 15124009 [patent_doc_number] => 20190348638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => NANOPARTICLES [patent_app_type] => utility [patent_app_number] => 16/309887 [patent_app_country] => US [patent_app_date] => 2017-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16309887 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/309887
Nanoparticles Jun 14, 2017 Issued
Array ( [id] => 14367303 [patent_doc_number] => 10304966 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Metal oxide TFT device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/545325 [patent_app_country] => US [patent_app_date] => 2017-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3310 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15545325 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/545325
Metal oxide TFT device and manufacturing method thereof Jun 13, 2017 Issued
Array ( [id] => 14913249 [patent_doc_number] => 10427930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => MEMS sensor with high voltage switch [patent_app_type] => utility [patent_app_number] => 15/620619 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6508 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15620619 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/620619
MEMS sensor with high voltage switch Jun 11, 2017 Issued
Array ( [id] => 13754865 [patent_doc_number] => 10170384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Methods and apparatus providing a graded package for a semiconductor [patent_app_type] => utility [patent_app_number] => 15/620361 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5748 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15620361 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/620361
Methods and apparatus providing a graded package for a semiconductor Jun 11, 2017 Issued
Array ( [id] => 13613501 [patent_doc_number] => 20180358300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => METHOD OF FABRICATING A THREE DIMENSIONAL ELECTRONIC STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/620375 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4540 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15620375 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/620375
Method of fabricating a three dimensional electronic structure Jun 11, 2017 Issued
Array ( [id] => 12534681 [patent_doc_number] => 10008417 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-26 [patent_title] => Vertical transport fin field effect transistors having different channel lengths [patent_app_type] => utility [patent_app_number] => 15/620369 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 7490 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15620369 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/620369
Vertical transport fin field effect transistors having different channel lengths Jun 11, 2017 Issued
Array ( [id] => 13159955 [patent_doc_number] => 10096713 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-10-09 [patent_title] => FinFET with sigma recessed source/drain and un-doped buffer layer epitaxy for uniform junction formation [patent_app_type] => utility [patent_app_number] => 15/619923 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6327 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15619923 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/619923
FinFET with sigma recessed source/drain and un-doped buffer layer epitaxy for uniform junction formation Jun 11, 2017 Issued
Array ( [id] => 12516141 [patent_doc_number] => 10002848 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-19 [patent_title] => Test method for a redistribution layer [patent_app_type] => utility [patent_app_number] => 15/619988 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 2519 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15619988 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/619988
Test method for a redistribution layer Jun 11, 2017 Issued
Array ( [id] => 11974696 [patent_doc_number] => 20170278850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-28 [patent_title] => 'PADS AND PIN-OUTS IN THREE DIMENSIONAL INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 15/620142 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10481 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15620142 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/620142
Pads and pin-outs in three dimensional integrated circuits Jun 11, 2017 Issued
Array ( [id] => 12355635 [patent_doc_number] => 09954058 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-04-24 [patent_title] => Self-aligned air gap spacer for nanosheet CMOS devices [patent_app_type] => utility [patent_app_number] => 15/620437 [patent_app_country] => US [patent_app_date] => 2017-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7209 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15620437 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/620437
Self-aligned air gap spacer for nanosheet CMOS devices Jun 11, 2017 Issued
Array ( [id] => 15286693 [patent_doc_number] => 10516017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-24 [patent_title] => Semiconductor device, and manufacturing method for same [patent_app_type] => utility [patent_app_number] => 16/301300 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 7271 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16301300 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/301300
Semiconductor device, and manufacturing method for same Jun 4, 2017 Issued
Array ( [id] => 14195903 [patent_doc_number] => 10265035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Method and device for motion control of a mobile medical device [patent_app_type] => utility [patent_app_number] => 15/610686 [patent_app_country] => US [patent_app_date] => 2017-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 9050 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15610686 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/610686
Method and device for motion control of a mobile medical device May 31, 2017 Issued
Array ( [id] => 12141126 [patent_doc_number] => 20180019210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'INTEGRATED CIRCUIT APPARATUS' [patent_app_type] => utility [patent_app_number] => 15/609039 [patent_app_country] => US [patent_app_date] => 2017-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5389 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15609039 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/609039
Integrated circuit apparatus May 30, 2017 Issued
Array ( [id] => 13085319 [patent_doc_number] => 10062733 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-28 [patent_title] => Integrated circuits with magnetic tunnel junction memory cells and methods for producing the same [patent_app_type] => utility [patent_app_number] => 15/609114 [patent_app_country] => US [patent_app_date] => 2017-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5096 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15609114 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/609114
Integrated circuits with magnetic tunnel junction memory cells and methods for producing the same May 30, 2017 Issued
Array ( [id] => 13145731 [patent_doc_number] => 10090204 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-10-02 [patent_title] => Vertical FINFET structure and methods of forming same [patent_app_type] => utility [patent_app_number] => 15/609201 [patent_app_country] => US [patent_app_date] => 2017-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 6802 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15609201 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/609201
Vertical FINFET structure and methods of forming same May 30, 2017 Issued
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