Search

Gabriele E. Bugaisky

Examiner (ID: 12390)

Most Active Art Unit
1653
Art Unit(s)
2899, 1653, 1643, 1609, 1654, 2900, 1634, 1804, 1814, 1652, 1656
Total Applications
617
Issued Applications
349
Pending Applications
104
Abandoned Applications
164

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3833023 [patent_doc_number] => 05790614 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Synchronized clock using a non-pullable reference oscillator' [patent_app_type] => 1 [patent_app_number] => 8/675649 [patent_app_country] => US [patent_app_date] => 1996-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 6887 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/790/05790614.pdf [firstpage_image] =>[orig_patent_app_number] => 675649 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/675649
Synchronized clock using a non-pullable reference oscillator Jul 1, 1996 Issued
Array ( [id] => 3884412 [patent_doc_number] => 05838726 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Method of automatically adjusting the output voltage in a transmission system' [patent_app_type] => 1 [patent_app_number] => 8/673267 [patent_app_country] => US [patent_app_date] => 1996-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 4827 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838726.pdf [firstpage_image] =>[orig_patent_app_number] => 673267 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/673267
Method of automatically adjusting the output voltage in a transmission system Jun 27, 1996 Issued
Array ( [id] => 3942068 [patent_doc_number] => 05953386 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'High speed clock recovery circuit using complimentary dividers' [patent_app_type] => 1 [patent_app_number] => 8/667150 [patent_app_country] => US [patent_app_date] => 1996-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 3453 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/953/05953386.pdf [firstpage_image] =>[orig_patent_app_number] => 667150 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/667150
High speed clock recovery circuit using complimentary dividers Jun 19, 1996 Issued
Array ( [id] => 3743247 [patent_doc_number] => 05694441 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-02 [patent_title] => 'Phase synchronizing apparatus, decoder and semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 8/666236 [patent_app_country] => US [patent_app_date] => 1996-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 6432 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/694/05694441.pdf [firstpage_image] =>[orig_patent_app_number] => 666236 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/666236
Phase synchronizing apparatus, decoder and semiconductor integrated circuit device Jun 19, 1996 Issued
Array ( [id] => 4062547 [patent_doc_number] => 05870429 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Apparatus method, and software modem for utilizing envelope delay distortion characteristics to determine a symbol rate and a carrier frequency for data transfer' [patent_app_type] => 1 [patent_app_number] => 8/664757 [patent_app_country] => US [patent_app_date] => 1996-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7802 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/870/05870429.pdf [firstpage_image] =>[orig_patent_app_number] => 664757 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/664757
Apparatus method, and software modem for utilizing envelope delay distortion characteristics to determine a symbol rate and a carrier frequency for data transfer Jun 16, 1996 Issued
Array ( [id] => 3639874 [patent_doc_number] => 05687193 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Manchester coder/decoder' [patent_app_type] => 1 [patent_app_number] => 8/665799 [patent_app_country] => US [patent_app_date] => 1996-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2477 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687193.pdf [firstpage_image] =>[orig_patent_app_number] => 665799 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/665799
Manchester coder/decoder Jun 16, 1996 Issued
Array ( [id] => 3875892 [patent_doc_number] => 05793813 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Communication system employing space-based and terrestrial telecommunications equipment' [patent_app_type] => 1 [patent_app_number] => 8/659317 [patent_app_country] => US [patent_app_date] => 1996-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4504 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793813.pdf [firstpage_image] =>[orig_patent_app_number] => 659317 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/659317
Communication system employing space-based and terrestrial telecommunications equipment Jun 5, 1996 Issued
Array ( [id] => 3839074 [patent_doc_number] => 05784410 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Reception automatic gain control system and method' [patent_app_type] => 1 [patent_app_number] => 8/657090 [patent_app_country] => US [patent_app_date] => 1996-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4659 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784410.pdf [firstpage_image] =>[orig_patent_app_number] => 657090 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/657090
Reception automatic gain control system and method Jun 2, 1996 Issued
Array ( [id] => 3894524 [patent_doc_number] => 05748674 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Decision-feedback equalizer for digital communication system' [patent_app_type] => 1 [patent_app_number] => 8/639924 [patent_app_country] => US [patent_app_date] => 1996-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2774 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/748/05748674.pdf [firstpage_image] =>[orig_patent_app_number] => 639924 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/639924
Decision-feedback equalizer for digital communication system Apr 25, 1996 Issued
Array ( [id] => 4065576 [patent_doc_number] => 05933460 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Phase detecting method and phase tracking loop circuit for a digital vestigial sideband modulation communication device' [patent_app_type] => 1 [patent_app_number] => 8/634416 [patent_app_country] => US [patent_app_date] => 1996-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5632 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/933/05933460.pdf [firstpage_image] =>[orig_patent_app_number] => 634416 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/634416
Phase detecting method and phase tracking loop circuit for a digital vestigial sideband modulation communication device Apr 17, 1996 Issued
Array ( [id] => 3868810 [patent_doc_number] => 05706311 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'Modulator circuit' [patent_app_type] => 1 [patent_app_number] => 8/631282 [patent_app_country] => US [patent_app_date] => 1996-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2046 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/706/05706311.pdf [firstpage_image] =>[orig_patent_app_number] => 631282 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/631282
Modulator circuit Apr 11, 1996 Issued
Array ( [id] => 3868867 [patent_doc_number] => 05768326 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'PLL circuit and method' [patent_app_type] => 1 [patent_app_number] => 8/631198 [patent_app_country] => US [patent_app_date] => 1996-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 110 [patent_no_of_words] => 16430 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768326.pdf [firstpage_image] =>[orig_patent_app_number] => 631198 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/631198
PLL circuit and method Apr 11, 1996 Issued
Array ( [id] => 3987771 [patent_doc_number] => 05905766 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Synchronizer, method and system for transferring data' [patent_app_type] => 1 [patent_app_number] => 8/625740 [patent_app_country] => US [patent_app_date] => 1996-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5254 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/905/05905766.pdf [firstpage_image] =>[orig_patent_app_number] => 625740 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/625740
Synchronizer, method and system for transferring data Mar 28, 1996 Issued
Array ( [id] => 3675443 [patent_doc_number] => 05668838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Instantaneous phase detecting circuit and clock recovery signal generating circuit incorporated in differential demodulator' [patent_app_type] => 1 [patent_app_number] => 8/621646 [patent_app_country] => US [patent_app_date] => 1996-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 53 [patent_no_of_words] => 16092 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668838.pdf [firstpage_image] =>[orig_patent_app_number] => 621646 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/621646
Instantaneous phase detecting circuit and clock recovery signal generating circuit incorporated in differential demodulator Mar 25, 1996 Issued
Array ( [id] => 3875554 [patent_doc_number] => 05796814 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Digital transmission system comprising a receiver with cascaded equalizers' [patent_app_type] => 1 [patent_app_number] => 8/618933 [patent_app_country] => US [patent_app_date] => 1996-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 4209 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796814.pdf [firstpage_image] =>[orig_patent_app_number] => 618933 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/618933
Digital transmission system comprising a receiver with cascaded equalizers Mar 19, 1996 Issued
Array ( [id] => 3853071 [patent_doc_number] => 05708686 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Method for receiver-side clock recovery for digital signals' [patent_app_type] => 1 [patent_app_number] => 8/618437 [patent_app_country] => US [patent_app_date] => 1996-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2898 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708686.pdf [firstpage_image] =>[orig_patent_app_number] => 618437 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/618437
Method for receiver-side clock recovery for digital signals Mar 14, 1996 Issued
Array ( [id] => 3823336 [patent_doc_number] => 05710796 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Method and receiver for determining a phase error in a radio-frequency signal' [patent_app_type] => 1 [patent_app_number] => 8/557178 [patent_app_country] => US [patent_app_date] => 1996-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2690 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710796.pdf [firstpage_image] =>[orig_patent_app_number] => 557178 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/557178
Method and receiver for determining a phase error in a radio-frequency signal Mar 13, 1996 Issued
Array ( [id] => 3660504 [patent_doc_number] => 05684837 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-04 [patent_title] => 'Adjustable digital FSK demodulator' [patent_app_type] => 1 [patent_app_number] => 8/611539 [patent_app_country] => US [patent_app_date] => 1996-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 32 [patent_no_of_words] => 5127 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/684/05684837.pdf [firstpage_image] =>[orig_patent_app_number] => 611539 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/611539
Adjustable digital FSK demodulator Mar 5, 1996 Issued
Array ( [id] => 3875852 [patent_doc_number] => 05793810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Method of bypassing vocoders in digital mobile communication system' [patent_app_type] => 1 [patent_app_number] => 8/611257 [patent_app_country] => US [patent_app_date] => 1996-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2221 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793810.pdf [firstpage_image] =>[orig_patent_app_number] => 611257 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/611257
Method of bypassing vocoders in digital mobile communication system Mar 4, 1996 Issued
Array ( [id] => 3827098 [patent_doc_number] => 05812619 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Digital phase lock loop and system for digital clock recovery' [patent_app_type] => 1 [patent_app_number] => 8/608165 [patent_app_country] => US [patent_app_date] => 1996-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4231 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812619.pdf [firstpage_image] =>[orig_patent_app_number] => 608165 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/608165
Digital phase lock loop and system for digital clock recovery Feb 27, 1996 Issued
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