Search

Ganapathy Krishnan

Examiner (ID: 6200, Phone: (571)272-0654 , Office: P/1673 )

Most Active Art Unit
1623
Art Unit(s)
1693, 1623, 1673
Total Applications
1669
Issued Applications
801
Pending Applications
199
Abandoned Applications
706

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3667564 [patent_doc_number] => 05623643 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Telecommunication system with improved reconfiguration flexibility having first and second communication modules where new operating system is tested with isolated second communication modules' [patent_app_type] => 1 [patent_app_number] => 8/593192 [patent_app_country] => US [patent_app_date] => 1996-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4292 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/623/05623643.pdf [firstpage_image] =>[orig_patent_app_number] => 593192 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/593192
Telecommunication system with improved reconfiguration flexibility having first and second communication modules where new operating system is tested with isolated second communication modules Jan 28, 1996 Issued
Array ( [id] => 3709339 [patent_doc_number] => 05619723 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'System for scheduling read ahead operations if new request is sequential of last n last read requests wherein n is different on independent activities' [patent_app_type] => 1 [patent_app_number] => 8/562238 [patent_app_country] => US [patent_app_date] => 1995-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 32091 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619723.pdf [firstpage_image] =>[orig_patent_app_number] => 562238 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/562238
System for scheduling read ahead operations if new request is sequential of last n last read requests wherein n is different on independent activities Nov 20, 1995 Issued
Array ( [id] => 3636154 [patent_doc_number] => 05594896 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Method for switching between a plurality of clock sources upon detection of phase alignment thereof and disabling all other clock sources' [patent_app_type] => 1 [patent_app_number] => 8/556247 [patent_app_country] => US [patent_app_date] => 1995-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3033 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594896.pdf [firstpage_image] =>[orig_patent_app_number] => 556247 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/556247
Method for switching between a plurality of clock sources upon detection of phase alignment thereof and disabling all other clock sources Nov 8, 1995 Issued
Array ( [id] => 3544838 [patent_doc_number] => 05584044 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-10 [patent_title] => 'Integrated circuit memory card for write in/read out capability having plurality of latching means for expandable addressing using counting means for enabling latches thereof' [patent_app_type] => 1 [patent_app_number] => 8/465619 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6120 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 526 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/584/05584044.pdf [firstpage_image] =>[orig_patent_app_number] => 465619 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/465619
Integrated circuit memory card for write in/read out capability having plurality of latching means for expandable addressing using counting means for enabling latches thereof Jun 4, 1995 Issued
Array ( [id] => 3585929 [patent_doc_number] => 05539917 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-23 [patent_title] => 'Computer system having circuitry interfacing a DMA controller directly with a parallel port having specific timing control to allow printing operation without microprocessor intervention' [patent_app_type] => 1 [patent_app_number] => 8/403585 [patent_app_country] => US [patent_app_date] => 1995-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7630 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/539/05539917.pdf [firstpage_image] =>[orig_patent_app_number] => 403585 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/403585
Computer system having circuitry interfacing a DMA controller directly with a parallel port having specific timing control to allow printing operation without microprocessor intervention Mar 13, 1995 Issued
Array ( [id] => 3700431 [patent_doc_number] => 05644715 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'System for scheduling multimedia sessions among a plurality of endpoint systems wherein endpoint systems negotiate connection requests with modification parameters' [patent_app_type] => 1 [patent_app_number] => 8/353168 [patent_app_country] => US [patent_app_date] => 1994-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3254 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644715.pdf [firstpage_image] =>[orig_patent_app_number] => 353168 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/353168
System for scheduling multimedia sessions among a plurality of endpoint systems wherein endpoint systems negotiate connection requests with modification parameters Dec 8, 1994 Issued
Array ( [id] => 3454754 [patent_doc_number] => 05467466 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-14 [patent_title] => 'Method for switching between a plurality of clock sources upon detection of phase alignment thereof and disabling all other clock sources' [patent_app_type] => 1 [patent_app_number] => 8/339426 [patent_app_country] => US [patent_app_date] => 1994-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3031 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/467/05467466.pdf [firstpage_image] =>[orig_patent_app_number] => 339426 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/339426
Method for switching between a plurality of clock sources upon detection of phase alignment thereof and disabling all other clock sources Nov 13, 1994 Issued
Array ( [id] => 3440571 [patent_doc_number] => 05463736 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-31 [patent_title] => 'Coupling facility for receiving commands from plurality of hosts for activating selected connection paths to I/O devices and maintaining status thereof' [patent_app_type] => 1 [patent_app_number] => 8/324447 [patent_app_country] => US [patent_app_date] => 1994-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10144 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/463/05463736.pdf [firstpage_image] =>[orig_patent_app_number] => 324447 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/324447
Coupling facility for receiving commands from plurality of hosts for activating selected connection paths to I/O devices and maintaining status thereof Oct 17, 1994 Issued
08/305758 MAN-MACHINE INTERFACE DEVICE Sep 13, 1994 Abandoned
08/268290 DUAL BUS COMPUTER ARCHITECTURE HAVING A HIGH SPEED MEMORY BUS Jun 29, 1994 Abandoned
Array ( [id] => 3474140 [patent_doc_number] => 05469548 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-21 [patent_title] => 'Disk array controller having internal protocol for sending address/transfer count information during first/second load cycles and transferring data after receiving an acknowldgement' [patent_app_type] => 1 [patent_app_number] => 8/263018 [patent_app_country] => US [patent_app_date] => 1994-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 35790 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/469/05469548.pdf [firstpage_image] =>[orig_patent_app_number] => 263018 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/263018
Disk array controller having internal protocol for sending address/transfer count information during first/second load cycles and transferring data after receiving an acknowldgement Jun 19, 1994 Issued
08/252988 METHOD AND APPARATUS FOR SUPPORTING 1/0 TRANSFER FOR VIRTUAL MACHINES May 31, 1994 Abandoned
Array ( [id] => 3647455 [patent_doc_number] => 05611048 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-11 [patent_title] => 'Remote password administration for a computer network among a plurality of nodes sending a password update message to all nodes and updating on authorized nodes' [patent_app_type] => 1 [patent_app_number] => 8/240291 [patent_app_country] => US [patent_app_date] => 1994-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5948 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/611/05611048.pdf [firstpage_image] =>[orig_patent_app_number] => 240291 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/240291
Remote password administration for a computer network among a plurality of nodes sending a password update message to all nodes and updating on authorized nodes May 8, 1994 Issued
Array ( [id] => 3534170 [patent_doc_number] => 05530960 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Disk drive controller accepting first commands for accessing composite drives and second commands for individual diagnostic drive control wherein commands are transparent to each other' [patent_app_type] => 1 [patent_app_number] => 8/224091 [patent_app_country] => US [patent_app_date] => 1994-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 32175 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/530/05530960.pdf [firstpage_image] =>[orig_patent_app_number] => 224091 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/224091
Disk drive controller accepting first commands for accessing composite drives and second commands for individual diagnostic drive control wherein commands are transparent to each other Apr 5, 1994 Issued
Array ( [id] => 3470275 [patent_doc_number] => 05473761 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-05 [patent_title] => 'Controller for receiving transfer requests for noncontiguous sectors and reading those sectors as a continuous block by interspersing no operation requests between transfer requests' [patent_app_type] => 1 [patent_app_number] => 8/218866 [patent_app_country] => US [patent_app_date] => 1994-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 31364 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/473/05473761.pdf [firstpage_image] =>[orig_patent_app_number] => 218866 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/218866
Controller for receiving transfer requests for noncontiguous sectors and reading those sectors as a continuous block by interspersing no operation requests between transfer requests Mar 27, 1994 Issued
Array ( [id] => 3532395 [patent_doc_number] => 05530844 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Method of coupling open systems to a proprietary network' [patent_app_type] => 1 [patent_app_number] => 8/194777 [patent_app_country] => US [patent_app_date] => 1994-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7594 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/530/05530844.pdf [firstpage_image] =>[orig_patent_app_number] => 194777 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/194777
Method of coupling open systems to a proprietary network Feb 9, 1994 Issued
Array ( [id] => 3681842 [patent_doc_number] => 05600824 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-04 [patent_title] => 'Clock generating means for generating bus clock and chip clock synchronously having frequency ratio of N-1/N responsive to synchronization signal for inhibiting data transfer' [patent_app_type] => 1 [patent_app_number] => 8/191865 [patent_app_country] => US [patent_app_date] => 1994-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3147 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/600/05600824.pdf [firstpage_image] =>[orig_patent_app_number] => 191865 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/191865
Clock generating means for generating bus clock and chip clock synchronously having frequency ratio of N-1/N responsive to synchronization signal for inhibiting data transfer Feb 3, 1994 Issued
Array ( [id] => 3524137 [patent_doc_number] => 05564042 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'Asynchronous clock switching between first and second clocks by extending phase of current clock and switching after a predetermined time and appropriated transitions' [patent_app_type] => 1 [patent_app_number] => 8/191446 [patent_app_country] => US [patent_app_date] => 1994-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3000 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/564/05564042.pdf [firstpage_image] =>[orig_patent_app_number] => 191446 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/191446
Asynchronous clock switching between first and second clocks by extending phase of current clock and switching after a predetermined time and appropriated transitions Feb 2, 1994 Issued
Array ( [id] => 3601986 [patent_doc_number] => 05517672 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-14 [patent_title] => 'Multi-channel device having storage modules in a loop configuration with main control unit for controlling data rates and modifying data selectively and independently therein' [patent_app_type] => 1 [patent_app_number] => 8/190219 [patent_app_country] => US [patent_app_date] => 1994-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3279 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/517/05517672.pdf [firstpage_image] =>[orig_patent_app_number] => 190219 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/190219
Multi-channel device having storage modules in a loop configuration with main control unit for controlling data rates and modifying data selectively and independently therein Jan 31, 1994 Issued
Array ( [id] => 3500415 [patent_doc_number] => 05475820 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-12 [patent_title] => 'Method for using one of two storage directories only after the other directory is full for write management in a disk device' [patent_app_type] => 1 [patent_app_number] => 8/180520 [patent_app_country] => US [patent_app_date] => 1994-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5350 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/475/05475820.pdf [firstpage_image] =>[orig_patent_app_number] => 180520 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/180520
Method for using one of two storage directories only after the other directory is full for write management in a disk device Jan 11, 1994 Issued
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