Search

Gary Chin

Examiner (ID: 1842)

Most Active Art Unit
2304
Art Unit(s)
2306, 2304, 2307, 3661, 2763, 3614, 2203
Total Applications
2057
Issued Applications
1788
Pending Applications
41
Abandoned Applications
228

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15138913 [patent_doc_number] => 10482938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Word-line timing control in a semiconductor memory device and a memory system including the same [patent_app_type] => utility [patent_app_number] => 15/691985 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 28 [patent_no_of_words] => 11807 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15691985 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/691985
Word-line timing control in a semiconductor memory device and a memory system including the same Aug 30, 2017 Issued
Array ( [id] => 14737947 [patent_doc_number] => 10388382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Methods and apparatus for programming memory [patent_app_type] => utility [patent_app_number] => 15/693133 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 8869 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15693133 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/693133
Methods and apparatus for programming memory Aug 30, 2017 Issued
Array ( [id] => 12054267 [patent_doc_number] => 20170330612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'DIGITAL FILTERS WITH MEMORY' [patent_app_type] => utility [patent_app_number] => 15/667349 [patent_app_country] => US [patent_app_date] => 2017-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 12070 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667349 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/667349
Digital filters with memory Aug 1, 2017 Issued
Array ( [id] => 12758902 [patent_doc_number] => 20180144802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => METHODS OF OPERATING NONVOLATILE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 15/607551 [patent_app_country] => US [patent_app_date] => 2017-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607551 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607551
Methods of operating nonvolatile memory devices including erasing a sub-block May 28, 2017 Issued
Array ( [id] => 14671529 [patent_doc_number] => 10373679 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-06 [patent_title] => Electronic device and method for reading data of resistive memory cell including drift recovery [patent_app_type] => utility [patent_app_number] => 15/604562 [patent_app_country] => US [patent_app_date] => 2017-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9624 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15604562 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/604562
Electronic device and method for reading data of resistive memory cell including drift recovery May 23, 2017 Issued
Array ( [id] => 11869286 [patent_doc_number] => 20170236571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'IMPLEMENTING EFUSE VISUAL SECURITY OF STORED DATA USING EDRAM' [patent_app_type] => utility [patent_app_number] => 15/587713 [patent_app_country] => US [patent_app_date] => 2017-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3445 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15587713 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/587713
Implementing eFuse visual security of stored data using EDRAM May 4, 2017 Issued
Array ( [id] => 13613111 [patent_doc_number] => 20180358105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-13 [patent_title] => MAGNETIC WALL UTILIZATION SPIN MOSFET AND MAGNETIC WALL UTILIZATION ANALOG MEMORY [patent_app_type] => utility [patent_app_number] => 15/781836 [patent_app_country] => US [patent_app_date] => 2017-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11324 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15781836 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/781836
Magnetic wall utilization spin MOSFET and magnetic wall utilization analog memory Apr 13, 2017 Issued
Array ( [id] => 14459341 [patent_doc_number] => 10325640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Magnetoresistive memory device with different write pulse patterns [patent_app_type] => utility [patent_app_number] => 15/456031 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 42 [patent_no_of_words] => 13128 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456031 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/456031
Magnetoresistive memory device with different write pulse patterns Mar 9, 2017 Issued
Array ( [id] => 14151153 [patent_doc_number] => 10255960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Write pulse generator in a resistive memory [patent_app_type] => utility [patent_app_number] => 15/455969 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 8639 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15455969 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/455969
Write pulse generator in a resistive memory Mar 9, 2017 Issued
Array ( [id] => 13419477 [patent_doc_number] => 20180261281 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-13 [patent_title] => METHODS FOR MITIGATING POWER LOSS EVENTS DURING OPERATION OF MEMORY DEVICES AND MEMORY DEVICES EMPLOYING THE SAME [patent_app_type] => utility [patent_app_number] => 15/456175 [patent_app_country] => US [patent_app_date] => 2017-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9018 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456175 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/456175
METHODS FOR MITIGATING POWER LOSS EVENTS DURING OPERATION OF MEMORY DEVICES AND MEMORY DEVICES EMPLOYING THE SAME Mar 9, 2017 Abandoned
Array ( [id] => 14061555 [patent_doc_number] => 10235070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Memory system having a semiconductor memory device with protected blocks [patent_app_type] => utility [patent_app_number] => 15/439859 [patent_app_country] => US [patent_app_date] => 2017-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 25 [patent_no_of_words] => 8966 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15439859 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/439859
Memory system having a semiconductor memory device with protected blocks Feb 21, 2017 Issued
Array ( [id] => 11622888 [patent_doc_number] => 20170133075 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => 'UNIDIRECTIONAL SPIN TORQUE TRANSFER MAGNETIC MEMORY CELL STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/413037 [patent_app_country] => US [patent_app_date] => 2017-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15413037 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/413037
Unidirectional spin torque transfer magnetic memory cell structure Jan 22, 2017 Issued
Array ( [id] => 11731049 [patent_doc_number] => 20170192492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'METHOD AND APPARATUS FOR SAVING POWER' [patent_app_type] => utility [patent_app_number] => 15/398456 [patent_app_country] => US [patent_app_date] => 2017-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4836 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15398456 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/398456
Method and apparatus for saving power, including at least two power saving modes Jan 3, 2017 Issued
Array ( [id] => 14952497 [patent_doc_number] => 10437512 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-08 [patent_title] => Techniques for non-volatile memory page retirement [patent_app_type] => utility [patent_app_number] => 15/394261 [patent_app_country] => US [patent_app_date] => 2016-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 11720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15394261 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/394261
Techniques for non-volatile memory page retirement Dec 28, 2016 Issued
Array ( [id] => 15987095 [patent_doc_number] => 10673892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Detection of malware features in a content item [patent_app_type] => utility [patent_app_number] => 15/392414 [patent_app_country] => US [patent_app_date] => 2016-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 10969 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15392414 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/392414
Detection of malware features in a content item Dec 27, 2016 Issued
Array ( [id] => 13629281 [patent_doc_number] => 20180366193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-20 [patent_title] => A STORAGE ARRAY [patent_app_type] => utility [patent_app_number] => 15/781961 [patent_app_country] => US [patent_app_date] => 2016-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15781961 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/781961
Cross-point storage array including correlated electron switches Nov 28, 2016 Issued
Array ( [id] => 11672218 [patent_doc_number] => 20170160940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-08 [patent_title] => 'DATA PROCESSING METHOD AND APPARATUS OF SOLID STATE DISK' [patent_app_type] => utility [patent_app_number] => 15/362558 [patent_app_country] => US [patent_app_date] => 2016-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8370 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15362558 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/362558
DATA PROCESSING METHOD AND APPARATUS OF SOLID STATE DISK Nov 27, 2016 Abandoned
Array ( [id] => 11890736 [patent_doc_number] => 09761299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-12 [patent_title] => 'Semiconductor integrated circuit capable of precisely adjusting delay amount of strobe signal' [patent_app_type] => utility [patent_app_number] => 15/360404 [patent_app_country] => US [patent_app_date] => 2016-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 10003 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 391 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15360404 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/360404
Semiconductor integrated circuit capable of precisely adjusting delay amount of strobe signal Nov 22, 2016 Issued
Array ( [id] => 11475263 [patent_doc_number] => 20170062046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATION' [patent_app_type] => utility [patent_app_number] => 15/351552 [patent_app_country] => US [patent_app_date] => 2016-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15351552 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/351552
Nonvolatile memory device with controlled word line setup time Nov 14, 2016 Issued
Array ( [id] => 12256760 [patent_doc_number] => 09928909 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-27 [patent_title] => 'RRAM reset of low resistive cells' [patent_app_type] => utility [patent_app_number] => 15/347319 [patent_app_country] => US [patent_app_date] => 2016-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2505 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15347319 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/347319
RRAM reset of low resistive cells Nov 8, 2016 Issued
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