Search

Gary F. Paumen

Examiner (ID: 15346, Phone: (571)272-2013 , Office: P/2833 )

Most Active Art Unit
2834
Art Unit(s)
3202, 2834, 2832, 0, 2833, 2899
Total Applications
7286
Issued Applications
6276
Pending Applications
316
Abandoned Applications
745

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1443859 [patent_doc_number] => 06336151 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-01 [patent_title] => 'System for controlling an external device connected through a peripheral device by providing a program formed by combination of the peripheral device and the external device to a host system' [patent_app_type] => B1 [patent_app_number] => 09/227571 [patent_app_country] => US [patent_app_date] => 1999-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 12852 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/336/06336151.pdf [firstpage_image] =>[orig_patent_app_number] => 09227571 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/227571
System for controlling an external device connected through a peripheral device by providing a program formed by combination of the peripheral device and the external device to a host system Jan 7, 1999 Issued
Array ( [id] => 4346008 [patent_doc_number] => 06330623 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'System and method for maximizing DMA transfers of arbitrarily aligned data' [patent_app_type] => 1 [patent_app_number] => 9/227122 [patent_app_country] => US [patent_app_date] => 1999-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 44 [patent_no_of_words] => 16301 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/330/06330623.pdf [firstpage_image] =>[orig_patent_app_number] => 227122 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/227122
System and method for maximizing DMA transfers of arbitrarily aligned data Jan 7, 1999 Issued
Array ( [id] => 1407302 [patent_doc_number] => 06560713 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'Computer power management system using auxiliary power supply during sleep state to provide power to all devices if sufficient and reducing load if not sufficient' [patent_app_type] => B1 [patent_app_number] => 09/224037 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1841 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/560/06560713.pdf [firstpage_image] =>[orig_patent_app_number] => 09224037 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224037
Computer power management system using auxiliary power supply during sleep state to provide power to all devices if sufficient and reducing load if not sufficient Dec 30, 1998 Issued
Array ( [id] => 4294262 [patent_doc_number] => 06324594 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'System for transferring data having a generator for generating a plurality of transfer extend entries in response to a plurality of commands received' [patent_app_type] => 1 [patent_app_number] => 9/223878 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 20247 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/324/06324594.pdf [firstpage_image] =>[orig_patent_app_number] => 223878 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223878
System for transferring data having a generator for generating a plurality of transfer extend entries in response to a plurality of commands received Dec 30, 1998 Issued
Array ( [id] => 4391337 [patent_doc_number] => 06289401 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Data storage system having a host computer coupled to bank of disk drives through interface comprising plurality of directors, two pairs of buses, and memory sections' [patent_app_type] => 1 [patent_app_number] => 9/223115 [patent_app_country] => US [patent_app_date] => 1998-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 32 [patent_no_of_words] => 10333 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/289/06289401.pdf [firstpage_image] =>[orig_patent_app_number] => 223115 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223115
Data storage system having a host computer coupled to bank of disk drives through interface comprising plurality of directors, two pairs of buses, and memory sections Dec 29, 1998 Issued
Array ( [id] => 1568596 [patent_doc_number] => 06339800 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-15 [patent_title] => 'Method for transmitting data between a microprocessor and an external memory module by using combined serial/parallel process' [patent_app_type] => B1 [patent_app_number] => 09/223386 [patent_app_country] => US [patent_app_date] => 1998-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3267 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/339/06339800.pdf [firstpage_image] =>[orig_patent_app_number] => 09223386 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223386
Method for transmitting data between a microprocessor and an external memory module by using combined serial/parallel process Dec 29, 1998 Issued
Array ( [id] => 4290065 [patent_doc_number] => 06308230 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Information/software interface having serial communications detection logic/electronics for determining either a host or an embedded microcomputer device controller connected thereto' [patent_app_type] => 1 [patent_app_number] => 9/228079 [patent_app_country] => US [patent_app_date] => 1998-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2787 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/308/06308230.pdf [firstpage_image] =>[orig_patent_app_number] => 228079 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/228079
Information/software interface having serial communications detection logic/electronics for determining either a host or an embedded microcomputer device controller connected thereto Dec 27, 1998 Issued
Array ( [id] => 4279485 [patent_doc_number] => 06205499 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'System for compressing video data using bi-orthogonal wavelet coding having a DSP for adjusting compression ratios to maintain a constant data flow rate of the compressed data' [patent_app_type] => 1 [patent_app_number] => 9/226634 [patent_app_country] => US [patent_app_date] => 1998-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6416 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/205/06205499.pdf [firstpage_image] =>[orig_patent_app_number] => 226634 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/226634
System for compressing video data using bi-orthogonal wavelet coding having a DSP for adjusting compression ratios to maintain a constant data flow rate of the compressed data Dec 17, 1998 Issued
Array ( [id] => 4401911 [patent_doc_number] => 06279060 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Universal serial bus peripheral bridge simulates a device disconnect condition to a host when the device is in a not-ready condition to avoid wasting bus resources' [patent_app_type] => 1 [patent_app_number] => 9/205558 [patent_app_country] => US [patent_app_date] => 1998-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5049 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/279/06279060.pdf [firstpage_image] =>[orig_patent_app_number] => 205558 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/205558
Universal serial bus peripheral bridge simulates a device disconnect condition to a host when the device is in a not-ready condition to avoid wasting bus resources Dec 3, 1998 Issued
Array ( [id] => 4401867 [patent_doc_number] => 06279057 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Communications system having dedicated frame buffers located in a channel node connected to two ports of the channel node for receiving frames' [patent_app_type] => 1 [patent_app_number] => 9/193681 [patent_app_country] => US [patent_app_date] => 1998-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 20422 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/279/06279057.pdf [firstpage_image] =>[orig_patent_app_number] => 193681 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/193681
Communications system having dedicated frame buffers located in a channel node connected to two ports of the channel node for receiving frames Nov 16, 1998 Issued
Array ( [id] => 4333036 [patent_doc_number] => 06317800 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-13 [patent_title] => 'System for reducing arbitrated-loop overhead by maintaining control of a communications channel as long as a predetermined amount of data is available within control of channel node' [patent_app_type] => 1 [patent_app_number] => 9/193482 [patent_app_country] => US [patent_app_date] => 1998-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 18939 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/317/06317800.pdf [firstpage_image] =>[orig_patent_app_number] => 193482 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/193482
System for reducing arbitrated-loop overhead by maintaining control of a communications channel as long as a predetermined amount of data is available within control of channel node Nov 16, 1998 Issued
Array ( [id] => 4404566 [patent_doc_number] => 06263450 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Programmable and resettable multifunction processor timer' [patent_app_type] => 1 [patent_app_number] => 9/192379 [patent_app_country] => US [patent_app_date] => 1998-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4185 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/263/06263450.pdf [firstpage_image] =>[orig_patent_app_number] => 192379 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/192379
Programmable and resettable multifunction processor timer Nov 15, 1998 Issued
Array ( [id] => 1587322 [patent_doc_number] => 06425034 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-23 [patent_title] => 'Fibre channel controller having both inbound and outbound control units for simultaneously processing both multiple inbound and outbound sequences' [patent_app_type] => B1 [patent_app_number] => 09/183164 [patent_app_country] => US [patent_app_date] => 1998-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 80 [patent_figures_cnt] => 92 [patent_no_of_words] => 24870 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/425/06425034.pdf [firstpage_image] =>[orig_patent_app_number] => 09183164 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/183164
Fibre channel controller having both inbound and outbound control units for simultaneously processing both multiple inbound and outbound sequences Oct 29, 1998 Issued
Array ( [id] => 4427273 [patent_doc_number] => 06226696 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Programmable circuit for sensing computer pointing devices to sink a different amount of current depending on the requirements of the device' [patent_app_type] => 1 [patent_app_number] => 9/182995 [patent_app_country] => US [patent_app_date] => 1998-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2789 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/226/06226696.pdf [firstpage_image] =>[orig_patent_app_number] => 182995 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/182995
Programmable circuit for sensing computer pointing devices to sink a different amount of current depending on the requirements of the device Oct 28, 1998 Issued
Array ( [id] => 4424645 [patent_doc_number] => 06230222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Prioritizing input device having a circuit indicating the highest priority key value when a plurality of keys being simultaneously selected' [patent_app_type] => 1 [patent_app_number] => 9/182847 [patent_app_country] => US [patent_app_date] => 1998-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/230/06230222.pdf [firstpage_image] =>[orig_patent_app_number] => 182847 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/182847
Prioritizing input device having a circuit indicating the highest priority key value when a plurality of keys being simultaneously selected Oct 28, 1998 Issued
Array ( [id] => 4345994 [patent_doc_number] => 06330622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Direct processor access via an external multi-purpose interface' [patent_app_type] => 1 [patent_app_number] => 9/178205 [patent_app_country] => US [patent_app_date] => 1998-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4830 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/330/06330622.pdf [firstpage_image] =>[orig_patent_app_number] => 178205 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/178205
Direct processor access via an external multi-purpose interface Oct 22, 1998 Issued
Array ( [id] => 4325028 [patent_doc_number] => 06253261 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'System and method for direct memory access in a computer system' [patent_app_type] => 1 [patent_app_number] => 9/176594 [patent_app_country] => US [patent_app_date] => 1998-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5082 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/253/06253261.pdf [firstpage_image] =>[orig_patent_app_number] => 176594 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/176594
System and method for direct memory access in a computer system Oct 20, 1998 Issued
Array ( [id] => 4423522 [patent_doc_number] => 06240467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Input/output operation request handling in a multi-host system' [patent_app_type] => 1 [patent_app_number] => 9/167860 [patent_app_country] => US [patent_app_date] => 1998-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8989 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240467.pdf [firstpage_image] =>[orig_patent_app_number] => 167860 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/167860
Input/output operation request handling in a multi-host system Oct 6, 1998 Issued
Array ( [id] => 4391993 [patent_doc_number] => 06289442 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Circuit and method for tagging and invalidating speculatively executed instructions' [patent_app_type] => 1 [patent_app_number] => 9/166037 [patent_app_country] => US [patent_app_date] => 1998-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 7303 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/289/06289442.pdf [firstpage_image] =>[orig_patent_app_number] => 166037 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/166037
Circuit and method for tagging and invalidating speculatively executed instructions Oct 4, 1998 Issued
Array ( [id] => 4291852 [patent_doc_number] => 06247074 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Portable computer with telephone line switching function and an expansion system and method for use therewith' [patent_app_type] => 1 [patent_app_number] => 9/165360 [patent_app_country] => US [patent_app_date] => 1998-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3786 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/247/06247074.pdf [firstpage_image] =>[orig_patent_app_number] => 165360 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/165360
Portable computer with telephone line switching function and an expansion system and method for use therewith Oct 1, 1998 Issued
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