Search

Gary J. Portka

Examiner (ID: 11070, Phone: (571)272-4211 , Office: P/2138 )

Most Active Art Unit
2138
Art Unit(s)
2187, 2188, 2312, 2787, 2751, 2138, 2759
Total Applications
1159
Issued Applications
1005
Pending Applications
27
Abandoned Applications
131

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14489531 [patent_doc_number] => 10331553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Garbage collection [patent_app_type] => utility [patent_app_number] => 15/478631 [patent_app_country] => US [patent_app_date] => 2017-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 11306 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478631 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/478631
Garbage collection Apr 3, 2017 Issued
Array ( [id] => 14489531 [patent_doc_number] => 10331553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Garbage collection [patent_app_type] => utility [patent_app_number] => 15/478631 [patent_app_country] => US [patent_app_date] => 2017-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 11306 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478631 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/478631
Garbage collection Apr 3, 2017 Issued
Array ( [id] => 14489531 [patent_doc_number] => 10331553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Garbage collection [patent_app_type] => utility [patent_app_number] => 15/478631 [patent_app_country] => US [patent_app_date] => 2017-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 11306 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478631 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/478631
Garbage collection Apr 3, 2017 Issued
Array ( [id] => 14489531 [patent_doc_number] => 10331553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Garbage collection [patent_app_type] => utility [patent_app_number] => 15/478631 [patent_app_country] => US [patent_app_date] => 2017-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 24 [patent_no_of_words] => 11306 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478631 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/478631
Garbage collection Apr 3, 2017 Issued
Array ( [id] => 12061622 [patent_doc_number] => 20170337966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'MEMORY DEVICE SHARED BY TWO OR MORE PROCESSORS AND SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/477382 [patent_app_country] => US [patent_app_date] => 2017-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6559 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15477382 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/477382
Memory device shared by two or more processors and system including the same Apr 2, 2017 Issued
Array ( [id] => 13467233 [patent_doc_number] => 20180285159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => PARALLEL INPUT/OUTPUT VIA MULTIPATH SOFTWARE [patent_app_type] => utility [patent_app_number] => 15/477174 [patent_app_country] => US [patent_app_date] => 2017-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6146 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15477174 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/477174
Parallel input/output via multipath software Apr 2, 2017 Issued
Array ( [id] => 13466661 [patent_doc_number] => 20180284873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => POWER CONSUMPTION MANAGEMENT FOR COMMUNICATION BUS [patent_app_type] => utility [patent_app_number] => 15/477042 [patent_app_country] => US [patent_app_date] => 2017-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15477042 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/477042
Power consumption management for communication bus Mar 31, 2017 Issued
Array ( [id] => 13767561 [patent_doc_number] => 10176124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => Scoreboard approach to managing idle page close timeout duration in memory [patent_app_type] => utility [patent_app_number] => 15/477069 [patent_app_country] => US [patent_app_date] => 2017-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11524 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15477069 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/477069
Scoreboard approach to managing idle page close timeout duration in memory Mar 31, 2017 Issued
Array ( [id] => 14798667 [patent_doc_number] => 10402338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Method and apparatus for erase block granularity eviction in host based caching [patent_app_type] => utility [patent_app_number] => 15/477037 [patent_app_country] => US [patent_app_date] => 2017-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 13941 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15477037 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/477037
Method and apparatus for erase block granularity eviction in host based caching Mar 31, 2017 Issued
Array ( [id] => 14555693 [patent_doc_number] => 10346308 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Cache partitioning in a multicore processor [patent_app_type] => utility [patent_app_number] => 15/474577 [patent_app_country] => US [patent_app_date] => 2017-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 10273 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15474577 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/474577
Cache partitioning in a multicore processor Mar 29, 2017 Issued
Array ( [id] => 14600835 [patent_doc_number] => 10353609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Memory allocation method and apparatus [patent_app_type] => utility [patent_app_number] => 15/460132 [patent_app_country] => US [patent_app_date] => 2017-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6505 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15460132 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/460132
Memory allocation method and apparatus Mar 14, 2017 Issued
Array ( [id] => 11958028 [patent_doc_number] => 20170262180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'INTEGRATED CONTROL OF WRITE-ONCE DATA STORAGE DEVICES' [patent_app_type] => utility [patent_app_number] => 15/450865 [patent_app_country] => US [patent_app_date] => 2017-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7952 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15450865 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/450865
INTEGRATED CONTROL OF WRITE-ONCE DATA STORAGE DEVICES Mar 5, 2017 Abandoned
Array ( [id] => 12413817 [patent_doc_number] => 09971548 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-05-15 [patent_title] => Storage resource management employing performance analytics [patent_app_type] => utility [patent_app_number] => 15/451013 [patent_app_country] => US [patent_app_date] => 2017-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 12704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 423 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15451013 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/451013
Storage resource management employing performance analytics Mar 5, 2017 Issued
Array ( [id] => 13281371 [patent_doc_number] => 10152269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-11 [patent_title] => Method and system for preserving branch cache file data segment identifiers upon volume replication [patent_app_type] => utility [patent_app_number] => 15/450983 [patent_app_country] => US [patent_app_date] => 2017-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5578 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15450983 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/450983
Method and system for preserving branch cache file data segment identifiers upon volume replication Mar 5, 2017 Issued
Array ( [id] => 13893015 [patent_doc_number] => 10199059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Using head and/or drive performance information for predicting and/or ascertaining failures [patent_app_type] => utility [patent_app_number] => 15/430790 [patent_app_country] => US [patent_app_date] => 2017-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 28 [patent_no_of_words] => 17474 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15430790 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/430790
Using head and/or drive performance information for predicting and/or ascertaining failures Feb 12, 2017 Issued
Array ( [id] => 11651350 [patent_doc_number] => 20170147251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'Queue Management Method and Apparatus' [patent_app_type] => utility [patent_app_number] => 15/425466 [patent_app_country] => US [patent_app_date] => 2017-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11744 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15425466 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/425466
Queue management method and apparatus Feb 5, 2017 Issued
Array ( [id] => 13332785 [patent_doc_number] => 20180217930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => REDUCING OR AVOIDING BUFFERING OF EVICTED CACHE DATA FROM AN UNCOMPRESSED CACHE MEMORY IN A COMPRESSION MEMORY SYSTEM WHEN STALLED WRITE OPERATIONS OCCUR [patent_app_type] => utility [patent_app_number] => 15/420667 [patent_app_country] => US [patent_app_date] => 2017-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15420667 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/420667
Reducing or avoiding buffering of evicted cache data from an uncompressed cache memory in a compression memory system when stalled write operations occur Jan 30, 2017 Issued
Array ( [id] => 13948277 [patent_doc_number] => 10209913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => System, method and computer program product for accelerating iterative graph algorithms by memory layout optimization [patent_app_type] => utility [patent_app_number] => 15/420629 [patent_app_country] => US [patent_app_date] => 2017-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5202 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15420629 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/420629
System, method and computer program product for accelerating iterative graph algorithms by memory layout optimization Jan 30, 2017 Issued
Array ( [id] => 11938650 [patent_doc_number] => 20170242800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'APPARATUS AND METHOD FOR HASH GENERATION' [patent_app_type] => utility [patent_app_number] => 15/420634 [patent_app_country] => US [patent_app_date] => 2017-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 12517 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15420634 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/420634
APPARATUS AND METHOD FOR HASH GENERATION Jan 30, 2017 Abandoned
Array ( [id] => 13109985 [patent_doc_number] => 10073646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-11 [patent_title] => Multi-tier data synchronizer based on concurrent linked list [patent_app_type] => utility [patent_app_number] => 15/420449 [patent_app_country] => US [patent_app_date] => 2017-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8776 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15420449 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/420449
Multi-tier data synchronizer based on concurrent linked list Jan 30, 2017 Issued
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