
Gary V. Harkcom
Examiner (ID: 869)
| Most Active Art Unit | 2306 |
| Art Unit(s) | 2306, 2301 |
| Total Applications | 367 |
| Issued Applications | 310 |
| Pending Applications | 0 |
| Abandoned Applications | 57 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2108454
[patent_doc_number] => 04484265
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-11-20
[patent_title] => 'Corner turn memory address generator'
[patent_app_type] => 1
[patent_app_number] => 6/319028
[patent_app_country] => US
[patent_app_date] => 1981-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2662
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 326
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/484/04484265.pdf
[firstpage_image] =>[orig_patent_app_number] => 319028
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/319028 | Corner turn memory address generator | Nov 5, 1981 | Issued |
| 06/316485 | DISPLAY DEVICE | Oct 28, 1981 | Abandoned |
Array
(
[id] => 2081037
[patent_doc_number] => 04445197
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-04-24
[patent_title] => 'Weak synchronization and scheduling among concurrent asynchronous processors'
[patent_app_type] => 1
[patent_app_number] => 6/315568
[patent_app_country] => US
[patent_app_date] => 1981-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3506
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/445/04445197.pdf
[firstpage_image] =>[orig_patent_app_number] => 315568
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/315568 | Weak synchronization and scheduling among concurrent asynchronous processors | Oct 26, 1981 | Issued |
Array
(
[id] => 2123158
[patent_doc_number] => 04449182
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-05-15
[patent_title] => 'Interface between a pair of processors, such as host and peripheral-controlling processors in data processing systems'
[patent_app_type] => 1
[patent_app_number] => 6/308826
[patent_app_country] => US
[patent_app_date] => 1981-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 19
[patent_no_of_words] => 11940
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 377
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/449/04449182.pdf
[firstpage_image] =>[orig_patent_app_number] => 308826
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/308826 | Interface between a pair of processors, such as host and peripheral-controlling processors in data processing systems | Oct 4, 1981 | Issued |
Array
(
[id] => 2113120
[patent_doc_number] => 04467416
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-08-21
[patent_title] => 'Logic transfer and decoding system'
[patent_app_type] => 1
[patent_app_number] => 6/302898
[patent_app_country] => US
[patent_app_date] => 1981-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 7287
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 433
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/467/04467416.pdf
[firstpage_image] =>[orig_patent_app_number] => 302898
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/302898 | Logic transfer and decoding system | Sep 15, 1981 | Issued |
Array
(
[id] => 2079409
[patent_doc_number] => 04460959
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-07-17
[patent_title] => 'Logic control system including cache memory for CPU-memory transfers'
[patent_app_type] => 1
[patent_app_number] => 6/302904
[patent_app_country] => US
[patent_app_date] => 1981-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 7119
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 342
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/460/04460959.pdf
[firstpage_image] =>[orig_patent_app_number] => 302904
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/302904 | Logic control system including cache memory for CPU-memory transfers | Sep 15, 1981 | Issued |
Array
(
[id] => 2075409
[patent_doc_number] => 04425630
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-01-10
[patent_title] => 'Sequence instruction display system'
[patent_app_type] => 1
[patent_app_number] => 6/302765
[patent_app_country] => US
[patent_app_date] => 1981-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 18
[patent_no_of_words] => 4465
[patent_no_of_claims] => 6
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[patent_words_short_claim] => 432
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/425/04425630.pdf
[firstpage_image] =>[orig_patent_app_number] => 302765
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/302765 | Sequence instruction display system | Sep 15, 1981 | Issued |
Array
(
[id] => 2086577
[patent_doc_number] => 04450522
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-05-22
[patent_title] => 'Apparatus for deriving addresses of data using displacements from base addresses which change only on call and return'
[patent_app_type] => 1
[patent_app_number] => 6/301999
[patent_app_country] => US
[patent_app_date] => 1981-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 27388
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 262
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/450/04450522.pdf
[firstpage_image] =>[orig_patent_app_number] => 301999
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/301999 | Apparatus for deriving addresses of data using displacements from base addresses which change only on call and return | Sep 10, 1981 | Issued |
Array
(
[id] => 2203374
[patent_doc_number] => 04503492
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1985-03-05
[patent_title] => 'Apparatus and methods for deriving addresses of data using painters whose values remain unchanged during an execution of a procedure'
[patent_app_type] => 1
[patent_app_number] => 6/302261
[patent_app_country] => US
[patent_app_date] => 1981-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 27034
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/503/04503492.pdf
[firstpage_image] =>[orig_patent_app_number] => 302261
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/302261 | Apparatus and methods for deriving addresses of data using painters whose values remain unchanged during an execution of a procedure | Sep 10, 1981 | Issued |
Array
(
[id] => 2104203
[patent_doc_number] => 04458325
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-07-03
[patent_title] => 'Calculator capable of calculating with additional externally instructed units'
[patent_app_type] => 1
[patent_app_number] => 6/294279
[patent_app_country] => US
[patent_app_date] => 1981-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 21
[patent_no_of_words] => 10642
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 288
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/458/04458325.pdf
[firstpage_image] =>[orig_patent_app_number] => 294279
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/294279 | Calculator capable of calculating with additional externally instructed units | Aug 18, 1981 | Issued |
Array
(
[id] => 2109114
[patent_doc_number] => 04484329
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-11-20
[patent_title] => 'Apparatus for the dynamic in-circuit element-to-element comparison testing of electronic digital circuit elements'
[patent_app_type] => 1
[patent_app_number] => 6/291727
[patent_app_country] => US
[patent_app_date] => 1981-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 9281
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/484/04484329.pdf
[firstpage_image] =>[orig_patent_app_number] => 291727
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/291727 | Apparatus for the dynamic in-circuit element-to-element comparison testing of electronic digital circuit elements | Aug 9, 1981 | Issued |
Array
(
[id] => 2119248
[patent_doc_number] => 04439859
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-03-27
[patent_title] => 'Method and system for retransmitting incorrectly received numbered frames in a data transmission system'
[patent_app_type] => 1
[patent_app_number] => 6/291672
[patent_app_country] => US
[patent_app_date] => 1981-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 11385
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/439/04439859.pdf
[firstpage_image] =>[orig_patent_app_number] => 291672
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/291672 | Method and system for retransmitting incorrectly received numbered frames in a data transmission system | Aug 9, 1981 | Issued |
Array
(
[id] => 2069678
[patent_doc_number] => 04441184
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-04-03
[patent_title] => 'Method and apparatus for transmitting a digital signal'
[patent_app_type] => 1
[patent_app_number] => 6/290850
[patent_app_country] => US
[patent_app_date] => 1981-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/441/04441184.pdf
[firstpage_image] =>[orig_patent_app_number] => 290850
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/290850 | Method and apparatus for transmitting a digital signal | Aug 6, 1981 | Issued |
Array
(
[id] => 2104786
[patent_doc_number] => 04429390
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-01-31
[patent_title] => 'Digital signal transmitting system'
[patent_app_type] => 1
[patent_app_number] => 6/290848
[patent_app_country] => US
[patent_app_date] => 1981-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/429/04429390.pdf
[firstpage_image] =>[orig_patent_app_number] => 290848
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/290848 | Digital signal transmitting system | Aug 6, 1981 | Issued |
Array
(
[id] => 2124983
[patent_doc_number] => 04481570
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-11-06
[patent_title] => 'Automatic multi-banking of memory for microprocessors'
[patent_app_type] => 1
[patent_app_number] => 6/291645
[patent_app_country] => US
[patent_app_date] => 1981-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 3945
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/481/04481570.pdf
[firstpage_image] =>[orig_patent_app_number] => 291645
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/291645 | Automatic multi-banking of memory for microprocessors | Aug 6, 1981 | Issued |
Array
(
[id] => 2115962
[patent_doc_number] => 04451921
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-05-29
[patent_title] => 'PCM Signal processing circuit'
[patent_app_type] => 1
[patent_app_number] => 6/289970
[patent_app_country] => US
[patent_app_date] => 1981-08-04
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/451/04451921.pdf
[firstpage_image] =>[orig_patent_app_number] => 289970
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/289970 | PCM Signal processing circuit | Aug 3, 1981 | Issued |
Array
(
[id] => 2423960
[patent_doc_number] => 04736373
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1988-04-05
[patent_title] => 'Memory tester having concurrent failure data readout and memory repair analysis'
[patent_app_type] => 1
[patent_app_number] => 6/283362
[patent_app_country] => US
[patent_app_date] => 1981-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/736/04736373.pdf
[firstpage_image] =>[orig_patent_app_number] => 283362
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/283362 | Memory tester having concurrent failure data readout and memory repair analysis | Aug 2, 1981 | Issued |
Array
(
[id] => 2094322
[patent_doc_number] => 04464757
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-08-07
[patent_title] => 'Method and device for writing and reading sector-organized information into and from a record carrier body'
[patent_app_type] => 1
[patent_app_number] => 6/289666
[patent_app_country] => US
[patent_app_date] => 1981-08-03
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/464/04464757.pdf
[firstpage_image] =>[orig_patent_app_number] => 289666
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/289666 | Method and device for writing and reading sector-organized information into and from a record carrier body | Aug 2, 1981 | Issued |
Array
(
[id] => 2125131
[patent_doc_number] => 04481584
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1984-11-06
[patent_title] => 'Highway information system'
[patent_app_type] => 1
[patent_app_number] => 6/288314
[patent_app_country] => US
[patent_app_date] => 1981-07-30
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/481/04481584.pdf
[firstpage_image] =>[orig_patent_app_number] => 288314
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/288314 | Highway information system | Jul 29, 1981 | Issued |
Array
(
[id] => 2042108
[patent_doc_number] => 04414669
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1983-11-08
[patent_title] => 'Self-testing pipeline processors'
[patent_app_type] => 1
[patent_app_number] => 6/286210
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[pdf_file] => patents/04/414/04414669.pdf
[firstpage_image] =>[orig_patent_app_number] => 286210
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/286210 | Self-testing pipeline processors | Jul 22, 1981 | Issued |