Search

Gary W. Cygiel

Examiner (ID: 19348, Phone: (571)270-1170 , Office: P/2137 )

Most Active Art Unit
2137
Art Unit(s)
2187, 2137, 2188
Total Applications
640
Issued Applications
458
Pending Applications
38
Abandoned Applications
153

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10982621 [patent_doc_number] => 20160179564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'ISOLATING DATA WITHIN A COMPUTER SYSTEM USING PRIVATE SHADOW MAPPINGS' [patent_app_type] => utility [patent_app_number] => 15/055468 [patent_app_country] => US [patent_app_date] => 2016-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 44512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15055468 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/055468
Isolating data within a computer system using private shadow mappings Feb 25, 2016 Issued
Array ( [id] => 11889936 [patent_doc_number] => 09760497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-12 [patent_title] => 'Hierarchy memory management' [patent_app_type] => utility [patent_app_number] => 15/050902 [patent_app_country] => US [patent_app_date] => 2016-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6143 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 498 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15050902 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/050902
Hierarchy memory management Feb 22, 2016 Issued
Array ( [id] => 11563533 [patent_doc_number] => 09626122 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-18 [patent_title] => 'Shifting a defrag operation in a mirrored system' [patent_app_type] => utility [patent_app_number] => 15/040231 [patent_app_country] => US [patent_app_date] => 2016-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4073 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 485 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15040231 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/040231
Shifting a defrag operation in a mirrored system Feb 9, 2016 Issued
Array ( [id] => 11332873 [patent_doc_number] => 09524118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-20 [patent_title] => 'Systems, devices, memory controllers, and methods for controlling memory' [patent_app_type] => utility [patent_app_number] => 14/996316 [patent_app_country] => US [patent_app_date] => 2016-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6739 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14996316 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/996316
Systems, devices, memory controllers, and methods for controlling memory Jan 14, 2016 Issued
Array ( [id] => 11644124 [patent_doc_number] => 09665500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'System supporting multiple partitions with differing translation formats' [patent_app_type] => utility [patent_app_number] => 14/994460 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 35 [patent_no_of_words] => 17078 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14994460 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/994460
System supporting multiple partitions with differing translation formats Jan 12, 2016 Issued
Array ( [id] => 11745630 [patent_doc_number] => 20170199703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'PHYSICAL ADDRESSING SCHEMES FOR NON-VOLATILE MEMORY SYSTEMS EMPLOYING MULTI-DIE INTERLEAVE SCHEMES' [patent_app_type] => utility [patent_app_number] => 14/994667 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 17337 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14994667 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/994667
Physical addressing schemes for non-volatile memory systems employing multi-die interleave schemes Jan 12, 2016 Issued
Array ( [id] => 11005961 [patent_doc_number] => 20160202910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-14 [patent_title] => 'ADDRESSING, INTERLEAVE, WEAR LEVELING, AND INITIALIZATION SCHEMES FOR DIFFERENT CHIP ENABLES AND MEMORY ARRAYS OF DIFFERENT TYPES' [patent_app_type] => utility [patent_app_number] => 14/994641 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 21686 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14994641 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/994641
Addressing, interleave, wear leveling, and initialization schemes for different chip enables and memory arrays of different types Jan 12, 2016 Issued
Array ( [id] => 11745634 [patent_doc_number] => 20170199707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'METHODS AND SYSTEMS FOR EFFICIENTLY STORING DATA' [patent_app_type] => utility [patent_app_number] => 14/995001 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9357 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14995001 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/995001
Methods and systems for efficiently storing data Jan 12, 2016 Issued
Array ( [id] => 11745602 [patent_doc_number] => 20170199675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'METHODS AND SYSTEMS FOR EFFICIENTLY STORING DATA' [patent_app_type] => utility [patent_app_number] => 14/994924 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10863 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14994924 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/994924
Methods and systems for efficiently storing data Jan 12, 2016 Issued
Array ( [id] => 11644123 [patent_doc_number] => 09665499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'System supporting multiple partitions with differing translation formats' [patent_app_type] => utility [patent_app_number] => 14/993136 [patent_app_country] => US [patent_app_date] => 2016-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 35 [patent_no_of_words] => 17078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14993136 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/993136
System supporting multiple partitions with differing translation formats Jan 11, 2016 Issued
Array ( [id] => 17194925 [patent_doc_number] => 11163682 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Systems, methods, and apparatuses for distributed consistency memory [patent_app_type] => utility [patent_app_number] => 14/983052 [patent_app_country] => US [patent_app_date] => 2015-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 25 [patent_no_of_words] => 12096 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14983052 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/983052
Systems, methods, and apparatuses for distributed consistency memory Dec 28, 2015 Issued
Array ( [id] => 11086404 [patent_doc_number] => 20160283370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'RUNTIME MEMORY MANAGEMENT USING MULTIPLE MEMORY MANAGERS' [patent_app_type] => utility [patent_app_number] => 14/968669 [patent_app_country] => US [patent_app_date] => 2015-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 15100 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14968669 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/968669
Runtime memory management using multiple memory managers Dec 13, 2015 Issued
Array ( [id] => 11651594 [patent_doc_number] => 20170147495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'OPTIMIZED MEMORY LAYOUT THROUGH DATA MINING' [patent_app_type] => utility [patent_app_number] => 14/951656 [patent_app_country] => US [patent_app_date] => 2015-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2315 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14951656 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/951656
Optimized memory layout through data mining Nov 24, 2015 Issued
Array ( [id] => 16462883 [patent_doc_number] => 10846231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Storage apparatus, recording medium, and storage control method [patent_app_type] => utility [patent_app_number] => 15/741097 [patent_app_country] => US [patent_app_date] => 2015-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 23273 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 349 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15741097 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/741097
Storage apparatus, recording medium, and storage control method Nov 12, 2015 Issued
Array ( [id] => 11102743 [patent_doc_number] => 20160299713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'DATA AGGREGATOR SERVING BETWEEN DATA SOURCE AND ELECTRONIC DEVICE AND ASSOCIATED DATA MANAGEMENT METHOD' [patent_app_type] => utility [patent_app_number] => 14/883640 [patent_app_country] => US [patent_app_date] => 2015-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2761 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14883640 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/883640
DATA AGGREGATOR SERVING BETWEEN DATA SOURCE AND ELECTRONIC DEVICE AND ASSOCIATED DATA MANAGEMENT METHOD Oct 14, 2015 Abandoned
Array ( [id] => 16408876 [patent_doc_number] => 10817429 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-27 [patent_title] => Resizable cache system and method [patent_app_type] => utility [patent_app_number] => 14/871865 [patent_app_country] => US [patent_app_date] => 2015-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4692 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14871865 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/871865
Resizable cache system and method Sep 29, 2015 Issued
Array ( [id] => 10991277 [patent_doc_number] => 20160188222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'Integrated Main Memory And Coprocessor With Low Latency' [patent_app_type] => utility [patent_app_number] => 14/872002 [patent_app_country] => US [patent_app_date] => 2015-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 16399 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14872002 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/872002
Integrated Main Memory And Coprocessor With Low Latency Sep 29, 2015 Abandoned
Array ( [id] => 13891271 [patent_doc_number] => 10198182 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Synchronization and verification groups among related devices [patent_app_type] => utility [patent_app_number] => 14/872013 [patent_app_country] => US [patent_app_date] => 2015-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 19768 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14872013 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/872013
Synchronization and verification groups among related devices Sep 29, 2015 Issued
Array ( [id] => 11531136 [patent_doc_number] => 20170091114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'HARDWARE ASSISTED DATA LOOKUP METHODS' [patent_app_type] => utility [patent_app_number] => 14/871757 [patent_app_country] => US [patent_app_date] => 2015-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9945 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14871757 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/871757
Hardware assisted data lookup methods Sep 29, 2015 Issued
Array ( [id] => 11384904 [patent_doc_number] => 20170010960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'MEMORY CONTROL UNIT AND DATA STORAGE APPARATUS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/857466 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14857466 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/857466
Memory control unit for controlling semiconductor memory device and data storage apparatus including the same Sep 16, 2015 Issued
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