
Gary W. Cygiel
Examiner (ID: 19348, Phone: (571)270-1170 , Office: P/2137 )
| Most Active Art Unit | 2137 |
| Art Unit(s) | 2187, 2137, 2188 |
| Total Applications | 640 |
| Issued Applications | 458 |
| Pending Applications | 38 |
| Abandoned Applications | 153 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16957968
[patent_doc_number] => 11061833
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-07-13
[patent_title] => Apparatus and method for handling page protection faults in a computing system
[patent_app_type] => utility
[patent_app_number] => 16/715902
[patent_app_country] => US
[patent_app_date] => 2019-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 21
[patent_no_of_words] => 10832
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715902
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/715902 | Apparatus and method for handling page protection faults in a computing system | Dec 15, 2019 | Issued |
Array
(
[id] => 17194945
[patent_doc_number] => 11163702
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-02
[patent_title] => Apparatus and method for handling page protection faults in a computing system
[patent_app_type] => utility
[patent_app_number] => 16/715949
[patent_app_country] => US
[patent_app_date] => 2019-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 21
[patent_no_of_words] => 10792
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715949
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/715949 | Apparatus and method for handling page protection faults in a computing system | Dec 15, 2019 | Issued |
Array
(
[id] => 15998107
[patent_doc_number] => 20200174924
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-04
[patent_title] => EFFICIENT DATA UNIT REUSE METHOD AND SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/698118
[patent_app_country] => US
[patent_app_date] => 2019-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5911
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698118
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/698118 | EFFICIENT DATA UNIT REUSE METHOD AND SYSTEM | Nov 26, 2019 | Abandoned |
Array
(
[id] => 19015084
[patent_doc_number] => 11922016
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-05
[patent_title] => Managing free space in a compressed memory system
[patent_app_type] => utility
[patent_app_number] => 17/293571
[patent_app_country] => US
[patent_app_date] => 2019-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 53
[patent_figures_cnt] => 58
[patent_no_of_words] => 30090
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 291
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17293571
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/293571 | Managing free space in a compressed memory system | Nov 13, 2019 | Issued |
Array
(
[id] => 17269053
[patent_doc_number] => 11194478
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-07
[patent_title] => System and method for shared memory ownership using context
[patent_app_type] => utility
[patent_app_number] => 16/658899
[patent_app_country] => US
[patent_app_date] => 2019-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 7020
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16658899
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/658899 | System and method for shared memory ownership using context | Oct 20, 2019 | Issued |
Array
(
[id] => 17846660
[patent_doc_number] => 11436033
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-06
[patent_title] => Scalable virtual memory metadata management
[patent_app_type] => utility
[patent_app_number] => 16/599141
[patent_app_country] => US
[patent_app_date] => 2019-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 14602
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16599141
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/599141 | Scalable virtual memory metadata management | Oct 10, 2019 | Issued |
Array
(
[id] => 16209056
[patent_doc_number] => 20200242046
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-30
[patent_title] => METHOD, SYSTEM, AND APPARATUS FOR PAGE SIZING EXTENSION
[patent_app_type] => utility
[patent_app_number] => 16/560213
[patent_app_country] => US
[patent_app_date] => 2019-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4948
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16560213
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/560213 | METHOD, SYSTEM, AND APPARATUS FOR PAGE SIZING EXTENSION | Sep 3, 2019 | Abandoned |
Array
(
[id] => 16358224
[patent_doc_number] => 10798756
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-10-06
[patent_title] => Forward error correction systems and methods
[patent_app_type] => utility
[patent_app_number] => 16/549273
[patent_app_country] => US
[patent_app_date] => 2019-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 13606
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549273
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/549273 | Forward error correction systems and methods | Aug 22, 2019 | Issued |
Array
(
[id] => 15151627
[patent_doc_number] => 20190354291
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-21
[patent_title] => EXTERNAL MEMORY FOR VIRTUALIZATION
[patent_app_type] => utility
[patent_app_number] => 16/530651
[patent_app_country] => US
[patent_app_date] => 2019-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 31129
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16530651
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/530651 | EXTERNAL MEMORY FOR VIRTUALIZATION | Aug 1, 2019 | Pending |
Array
(
[id] => 14901149
[patent_doc_number] => 20190294340
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-26
[patent_title] => ALLOCATION OF EXTERNAL MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/439053
[patent_app_country] => US
[patent_app_date] => 2019-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 35800
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439053
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/439053 | Allocation of external memory | Jun 11, 2019 | Issued |
Array
(
[id] => 17143984
[patent_doc_number] => 20210311997
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => BINARY SEARCH PROCEDURE FOR CONTROL TABLE STORED IN MEMORY SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/260109
[patent_app_country] => US
[patent_app_date] => 2019-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 29284
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 270
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17260109
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/260109 | Binary search procedure for control table stored in memory system | Jun 5, 2019 | Issued |
Array
(
[id] => 17194736
[patent_doc_number] => 11163489
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-02
[patent_title] => Workload clusterization for memory system and method of executing the same
[patent_app_type] => utility
[patent_app_number] => 16/420746
[patent_app_country] => US
[patent_app_date] => 2019-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7139
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 250
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16420746
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/420746 | Workload clusterization for memory system and method of executing the same | May 22, 2019 | Issued |
Array
(
[id] => 15836577
[patent_doc_number] => 20200133571
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-30
[patent_title] => METHOD OF OPERATING STORAGE DEVICE, STORAGE DEVICE PERFORMING THE SAME AND METHOD OF OPERATING STORAGE SYSTEM USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/416872
[patent_app_country] => US
[patent_app_date] => 2019-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10072
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416872
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/416872 | Method of operating storage device, storage device performing the same and method of operating storage system using the same | May 19, 2019 | Issued |
Array
(
[id] => 16454561
[patent_doc_number] => 20200363987
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-19
[patent_title] => UNIFIED CHIP ENABLE, ADDRESS AND COMMAND LATCH ENABLE PROTOCOL FOR NAND MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/414708
[patent_app_country] => US
[patent_app_date] => 2019-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10041
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 26
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16414708
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/414708 | Unified chip enable, address and command latch enable protocol for nand memory | May 15, 2019 | Issued |
Array
(
[id] => 17325373
[patent_doc_number] => 11216385
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-01-04
[patent_title] => Application processor, system-on chip and method of operating memory management unit
[patent_app_type] => utility
[patent_app_number] => 16/413034
[patent_app_country] => US
[patent_app_date] => 2019-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 26
[patent_no_of_words] => 9166
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 298
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413034
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/413034 | Application processor, system-on chip and method of operating memory management unit | May 14, 2019 | Issued |
Array
(
[id] => 17283153
[patent_doc_number] => 11200182
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-12-14
[patent_title] => System and method for device synchronization
[patent_app_type] => utility
[patent_app_number] => 16/411500
[patent_app_country] => US
[patent_app_date] => 2019-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 10167
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411500
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/411500 | System and method for device synchronization | May 13, 2019 | Issued |
Array
(
[id] => 18480004
[patent_doc_number] => 11693744
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-04
[patent_title] => Synthesizing format-specific full backup images
[patent_app_type] => utility
[patent_app_number] => 16/409230
[patent_app_country] => US
[patent_app_date] => 2019-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 17
[patent_no_of_words] => 38428
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 400
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16409230
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/409230 | Synthesizing format-specific full backup images | May 9, 2019 | Issued |
Array
(
[id] => 16438976
[patent_doc_number] => 20200356302
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-12
[patent_title] => METHOD PROVIDING RESILIENT EXECUTION OF A SERVICE ON A COMPUTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/406566
[patent_app_country] => US
[patent_app_date] => 2019-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9707
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406566
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/406566 | Method providing resilient execution of a service on a computing device | May 7, 2019 | Issued |
Array
(
[id] => 15090195
[patent_doc_number] => 20190339908
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-07
[patent_title] => Memory Controller For Micro-Threaded Memory Operations
[patent_app_type] => utility
[patent_app_number] => 16/405479
[patent_app_country] => US
[patent_app_date] => 2019-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20258
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16405479
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/405479 | Memory controller for micro-threaded memory operations | May 6, 2019 | Issued |
Array
(
[id] => 14719547
[patent_doc_number] => 20190250837
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-15
[patent_title] => PAGING OF EXTERNAL MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/395329
[patent_app_country] => US
[patent_app_date] => 2019-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 46069
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16395329
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/395329 | Paging of external memory | Apr 25, 2019 | Issued |