Search

Geepy Pe

Examiner (ID: 16190, Phone: (571)270-3703 , Office: P/2488 )

Most Active Art Unit
2488
Art Unit(s)
2621, 4124, 2485, 2488, 3663, 2483, 4100, 4125
Total Applications
410
Issued Applications
240
Pending Applications
1
Abandoned Applications
170

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4070541 [patent_doc_number] => 05970349 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Semiconductor device having one or more asymmetric background dopant regions and method of manufacture thereof' [patent_app_type] => 1 [patent_app_number] => 9/139179 [patent_app_country] => US [patent_app_date] => 1998-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2863 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970349.pdf [firstpage_image] =>[orig_patent_app_number] => 139179 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/139179
Semiconductor device having one or more asymmetric background dopant regions and method of manufacture thereof Aug 23, 1998 Issued
Array ( [id] => 4214037 [patent_doc_number] => 06110754 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Method of manufacture of a thermal elastic rotary impeller ink jet print head' [patent_app_type] => 1 [patent_app_number] => 9/113089 [patent_app_country] => US [patent_app_date] => 1998-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 14836 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/110/06110754.pdf [firstpage_image] =>[orig_patent_app_number] => 113089 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/113089
Method of manufacture of a thermal elastic rotary impeller ink jet print head Jul 9, 1998 Issued
Array ( [id] => 4181196 [patent_doc_number] => 06020233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Ferroelectric memory device guaranteeing electrical interconnection between lower capacitor electrode and contact plug and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/107288 [patent_app_country] => US [patent_app_date] => 1998-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 4184 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/020/06020233.pdf [firstpage_image] =>[orig_patent_app_number] => 107288 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/107288
Ferroelectric memory device guaranteeing electrical interconnection between lower capacitor electrode and contact plug and method for fabricating the same Jun 29, 1998 Issued
Array ( [id] => 4030612 [patent_doc_number] => 05963783 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'In-line detection and assessment of net charge in PECVD silicon dioxide (oxide) layers' [patent_app_type] => 1 [patent_app_number] => 9/093239 [patent_app_country] => US [patent_app_date] => 1998-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4866 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963783.pdf [firstpage_image] =>[orig_patent_app_number] => 093239 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/093239
In-line detection and assessment of net charge in PECVD silicon dioxide (oxide) layers Jun 7, 1998 Issued
Array ( [id] => 3937004 [patent_doc_number] => 05915185 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Method of producing MOSFET transistors by means of tilted implants' [patent_app_type] => 1 [patent_app_number] => 9/062859 [patent_app_country] => US [patent_app_date] => 1998-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 2731 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/915/05915185.pdf [firstpage_image] =>[orig_patent_app_number] => 062859 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/062859
Method of producing MOSFET transistors by means of tilted implants Apr 19, 1998 Issued
Array ( [id] => 3885899 [patent_doc_number] => 05893732 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-13 [patent_title] => 'Method of fabricating intermediate SRAM array product and conditioning memory elements thereof' [patent_app_type] => 1 [patent_app_number] => 9/038064 [patent_app_country] => US [patent_app_date] => 1998-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 2613 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/893/05893732.pdf [firstpage_image] =>[orig_patent_app_number] => 038064 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/038064
Method of fabricating intermediate SRAM array product and conditioning memory elements thereof Mar 10, 1998 Issued
Array ( [id] => 4070442 [patent_doc_number] => 05970342 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Method of forming high capacitive-coupling ratio and high speed flash memories with a textured tunnel oxide' [patent_app_type] => 1 [patent_app_number] => 9/036027 [patent_app_country] => US [patent_app_date] => 1998-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3017 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 385 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970342.pdf [firstpage_image] =>[orig_patent_app_number] => 036027 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/036027
Method of forming high capacitive-coupling ratio and high speed flash memories with a textured tunnel oxide Mar 5, 1998 Issued
Array ( [id] => 4090504 [patent_doc_number] => 05966611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Semiconductor processing for forming capacitors by etching polysilicon and coating layer formed over the polysilicon' [patent_app_type] => 1 [patent_app_number] => 9/031089 [patent_app_country] => US [patent_app_date] => 1998-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2408 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/966/05966611.pdf [firstpage_image] =>[orig_patent_app_number] => 031089 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/031089
Semiconductor processing for forming capacitors by etching polysilicon and coating layer formed over the polysilicon Feb 25, 1998 Issued
Array ( [id] => 4069914 [patent_doc_number] => 05970312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Method for evaluating HSG silicon film of semiconductor device by atomic force microscopy' [patent_app_type] => 1 [patent_app_number] => 9/012119 [patent_app_country] => US [patent_app_date] => 1998-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2289 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970312.pdf [firstpage_image] =>[orig_patent_app_number] => 012119 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/012119
Method for evaluating HSG silicon film of semiconductor device by atomic force microscopy Jan 21, 1998 Issued
Array ( [id] => 3952879 [patent_doc_number] => 05940703 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Method for manufacturing DRAM capacitors with T-shape lower electrodes by etching oxide sidewalls' [patent_app_type] => 1 [patent_app_number] => 9/010119 [patent_app_country] => US [patent_app_date] => 1998-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2751 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/940/05940703.pdf [firstpage_image] =>[orig_patent_app_number] => 010119 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/010119
Method for manufacturing DRAM capacitors with T-shape lower electrodes by etching oxide sidewalls Jan 20, 1998 Issued
Array ( [id] => 3957220 [patent_doc_number] => 05930623 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Method of forming a data storage capacitor with a wide electrode area for dynamic random access memory using double spacers' [patent_app_type] => 1 [patent_app_number] => 9/005449 [patent_app_country] => US [patent_app_date] => 1998-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4002 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 490 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930623.pdf [firstpage_image] =>[orig_patent_app_number] => 005449 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/005449
Method of forming a data storage capacitor with a wide electrode area for dynamic random access memory using double spacers Jan 11, 1998 Issued
Array ( [id] => 3952962 [patent_doc_number] => 05940709 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Method and system for source only reoxidation after junction implant for flash memory devices' [patent_app_type] => 1 [patent_app_number] => 8/993599 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2741 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/940/05940709.pdf [firstpage_image] =>[orig_patent_app_number] => 993599 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/993599
Method and system for source only reoxidation after junction implant for flash memory devices Dec 17, 1997 Issued
Array ( [id] => 3941549 [patent_doc_number] => 05989959 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Method of manufacturing nonvolatile semiconductor memory devices with a reduced number of gate electrode forming steps' [patent_app_type] => 1 [patent_app_number] => 8/992509 [patent_app_country] => US [patent_app_date] => 1997-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 52 [patent_no_of_words] => 5235 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/989/05989959.pdf [firstpage_image] =>[orig_patent_app_number] => 992509 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/992509
Method of manufacturing nonvolatile semiconductor memory devices with a reduced number of gate electrode forming steps Dec 16, 1997 Issued
Array ( [id] => 3969545 [patent_doc_number] => 05904564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Method for fabricating MOSFET having cobalt silicide film' [patent_app_type] => 1 [patent_app_number] => 8/991668 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2780 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/904/05904564.pdf [firstpage_image] =>[orig_patent_app_number] => 991668 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991668
Method for fabricating MOSFET having cobalt silicide film Dec 15, 1997 Issued
Array ( [id] => 4006276 [patent_doc_number] => 05888836 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Process for the repair of floating-gate non-volatile memories damaged by plasma treatment' [patent_app_type] => 1 [patent_app_number] => 8/990328 [patent_app_country] => US [patent_app_date] => 1997-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1700 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/888/05888836.pdf [firstpage_image] =>[orig_patent_app_number] => 990328 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/990328
Process for the repair of floating-gate non-volatile memories damaged by plasma treatment Dec 14, 1997 Issued
Array ( [id] => 3945513 [patent_doc_number] => 05953621 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Method for forming a self-aligned isolation trench' [patent_app_type] => 1 [patent_app_number] => 8/985588 [patent_app_country] => US [patent_app_date] => 1997-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 5903 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/953/05953621.pdf [firstpage_image] =>[orig_patent_app_number] => 985588 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/985588
Method for forming a self-aligned isolation trench Dec 4, 1997 Issued
Array ( [id] => 4016262 [patent_doc_number] => 05923970 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Method of fabricating a ferrolelectric capacitor with a graded barrier layer structure' [patent_app_type] => 1 [patent_app_number] => 8/974779 [patent_app_country] => US [patent_app_date] => 1997-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 4075 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923970.pdf [firstpage_image] =>[orig_patent_app_number] => 974779 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/974779
Method of fabricating a ferrolelectric capacitor with a graded barrier layer structure Nov 19, 1997 Issued
Array ( [id] => 3943497 [patent_doc_number] => 05976928 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Chemical mechanical polishing of FeRAM capacitors' [patent_app_type] => 1 [patent_app_number] => 8/975366 [patent_app_country] => US [patent_app_date] => 1997-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 7444 [patent_no_of_claims] => 69 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/976/05976928.pdf [firstpage_image] =>[orig_patent_app_number] => 975366 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/975366
Chemical mechanical polishing of FeRAM capacitors Nov 19, 1997 Issued
Array ( [id] => 4023845 [patent_doc_number] => 05882969 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Method for manufacturing an electrically writeable and erasable read-only memory cell arrangement' [patent_app_type] => 1 [patent_app_number] => 8/967419 [patent_app_country] => US [patent_app_date] => 1997-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4642 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 362 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/882/05882969.pdf [firstpage_image] =>[orig_patent_app_number] => 967419 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/967419
Method for manufacturing an electrically writeable and erasable read-only memory cell arrangement Nov 10, 1997 Issued
Array ( [id] => 3935311 [patent_doc_number] => 05972779 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Method for forming field oxide film of semiconductor device with silicon and nitrogen containing etching residue' [patent_app_type] => 1 [patent_app_number] => 8/965893 [patent_app_country] => US [patent_app_date] => 1997-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 3556 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/972/05972779.pdf [firstpage_image] =>[orig_patent_app_number] => 965893 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/965893
Method for forming field oxide film of semiconductor device with silicon and nitrogen containing etching residue Nov 6, 1997 Issued
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