
Gene Nghia Auduong
Examiner (ID: 6158, Phone: (571)272-1773 , Office: P/2825 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2825, 2818, 2827, 2712 |
| Total Applications | 1939 |
| Issued Applications | 1863 |
| Pending Applications | 12 |
| Abandoned Applications | 67 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11817718
[patent_doc_number] => 09721675
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-08-01
[patent_title] => 'Memory device having input circuit and operating method of same'
[patent_app_type] => utility
[patent_app_number] => 15/346807
[patent_app_country] => US
[patent_app_date] => 2016-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5611
[patent_no_of_claims] => 15
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[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15346807
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/346807 | Memory device having input circuit and operating method of same | Nov 8, 2016 | Issued |
Array
(
[id] => 11502604
[patent_doc_number] => 20170076789
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-03-16
[patent_title] => 'MEMORY WITH OUTPUT CONTROL'
[patent_app_type] => utility
[patent_app_number] => 15/345552
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15345552
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/345552 | Flash memory system | Nov 7, 2016 | Issued |
Array
(
[id] => 11622890
[patent_doc_number] => 20170133077
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-05-11
[patent_title] => 'ELECTROENTROPIC MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/343779
[patent_app_country] => US
[patent_app_date] => 2016-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/343779 | Electroentropic memory device | Nov 3, 2016 | Issued |
Array
(
[id] => 11753218
[patent_doc_number] => 09711236
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-18
[patent_title] => 'Methods and apparatus to program multi-level cell memory using target-only verify'
[patent_app_type] => utility
[patent_app_number] => 15/299008
[patent_app_country] => US
[patent_app_date] => 2016-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15299008
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/299008 | Methods and apparatus to program multi-level cell memory using target-only verify | Oct 19, 2016 | Issued |
Array
(
[id] => 13145375
[patent_doc_number] => 10090025
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-02
[patent_title] => Discharging electric charge in integrated circuit unless in-specification condition(s) detected
[patent_app_type] => utility
[patent_app_number] => 15/292616
[patent_app_country] => US
[patent_app_date] => 2016-10-13
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15292616
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/292616 | Discharging electric charge in integrated circuit unless in-specification condition(s) detected | Oct 12, 2016 | Issued |
Array
(
[id] => 11687189
[patent_doc_number] => 09685239
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-06-20
[patent_title] => 'Field sub-bitline nor flash array'
[patent_app_type] => utility
[patent_app_number] => 15/291932
[patent_app_country] => US
[patent_app_date] => 2016-10-12
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15291932
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/291932 | Field sub-bitline nor flash array | Oct 11, 2016 | Issued |
Array
(
[id] => 12395625
[patent_doc_number] => 09966127
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-08
[patent_title] => Compensating for variations in selector threshold voltages
[patent_app_type] => utility
[patent_app_number] => 15/291711
[patent_app_country] => US
[patent_app_date] => 2016-10-12
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15291711
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/291711 | Compensating for variations in selector threshold voltages | Oct 11, 2016 | Issued |
Array
(
[id] => 11918180
[patent_doc_number] => 09786371
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-10-10
[patent_title] => 'Power-on reset circuit with variable detection reference and semiconductor memory device including the same'
[patent_app_type] => utility
[patent_app_number] => 15/290702
[patent_app_country] => US
[patent_app_date] => 2016-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15290702
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/290702 | Power-on reset circuit with variable detection reference and semiconductor memory device including the same | Oct 10, 2016 | Issued |
Array
(
[id] => 11599495
[patent_doc_number] => 09646671
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-05-09
[patent_title] => 'Systems and methods for managing write voltages in a cross-point memory array'
[patent_app_type] => utility
[patent_app_number] => 15/288886
[patent_app_country] => US
[patent_app_date] => 2016-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15288886
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/288886 | Systems and methods for managing write voltages in a cross-point memory array | Oct 6, 2016 | Issued |
Array
(
[id] => 11681103
[patent_doc_number] => 09679637
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-06-13
[patent_title] => 'Single-ended memory device with differential sensing'
[patent_app_type] => utility
[patent_app_number] => 15/288235
[patent_app_country] => US
[patent_app_date] => 2016-10-07
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15288235
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/288235 | Single-ended memory device with differential sensing | Oct 6, 2016 | Issued |
Array
(
[id] => 11592648
[patent_doc_number] => 20170117060
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-04-27
[patent_title] => 'MULTI-PORT MEMORY, SEMICONDUCTOR DEVICE, AND MEMORY MACRO-CELL'
[patent_app_type] => utility
[patent_app_number] => 15/281947
[patent_app_country] => US
[patent_app_date] => 2016-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15281947
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/281947 | Multi-port memory, semiconductor device, and memory macro-cell | Sep 29, 2016 | Issued |
Array
(
[id] => 11817694
[patent_doc_number] => 09721651
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-01
[patent_title] => 'Write driver and level shifter having shared transistors'
[patent_app_type] => utility
[patent_app_number] => 15/281312
[patent_app_country] => US
[patent_app_date] => 2016-09-30
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15281312
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/281312 | Write driver and level shifter having shared transistors | Sep 29, 2016 | Issued |
Array
(
[id] => 11753183
[patent_doc_number] => 09711201
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-07-18
[patent_title] => 'Reconfigurable and writable magnetic charge crystals'
[patent_app_type] => utility
[patent_app_number] => 15/280915
[patent_app_country] => US
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15280915
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/280915 | Reconfigurable and writable magnetic charge crystals | Sep 28, 2016 | Issued |
Array
(
[id] => 12012460
[patent_doc_number] => 09805780
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-31
[patent_title] => 'Nonvolatile memory with magnetoresistive element and transistor'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/267715 | Nonvolatile memory with magnetoresistive element and transistor | Sep 15, 2016 | Issued |
Array
(
[id] => 11854670
[patent_doc_number] => 20170229162
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-10
[patent_title] => 'NONVOLATILE RAM'
[patent_app_type] => utility
[patent_app_number] => 15/266393
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/266393 | NONVOLATILE RAM | Sep 14, 2016 | Abandoned |
Array
(
[id] => 11701566
[patent_doc_number] => 09691489
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-06-27
[patent_title] => 'Nonvolatile semiconductor memory device with first and second read operations with different read voltages'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/263518 | Nonvolatile semiconductor memory device with first and second read operations with different read voltages | Sep 12, 2016 | Issued |
Array
(
[id] => 14204569
[patent_doc_number] => 10269402
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-04-23
[patent_title] => Magnetic topological soliton detection
[patent_app_type] => utility
[patent_app_number] => 15/260718
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/260718 | Magnetic topological soliton detection | Sep 8, 2016 | Issued |
Array
(
[id] => 14366455
[patent_doc_number] => 10304539
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-05-28
[patent_title] => Method of performing a write operation based on an idle time
[patent_app_type] => utility
[patent_app_number] => 15/259743
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/259743 | Method of performing a write operation based on an idle time | Sep 7, 2016 | Issued |
Array
(
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[patent_title] => 'Fail-safe I/O to achieve ultra low system power'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/236797 | Fail-safe I/O to achieve ultra low system power | Aug 14, 2016 | Issued |
Array
(
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[patent_title] => 'Semiconductor storage device for controlling word lines independently of power-on sequence'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/232216 | Semiconductor storage device for controlling word lines independently of power-on sequence | Aug 8, 2016 | Issued |