
Gene Nghia Auduong
Examiner (ID: 2491)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2827, 2712, 2818, 2825 |
| Total Applications | 1939 |
| Issued Applications | 1863 |
| Pending Applications | 12 |
| Abandoned Applications | 67 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11452991
[patent_doc_number] => 09576639
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-21
[patent_title] => 'Method for controlling a semiconductor device having CAL latency function'
[patent_app_type] => utility
[patent_app_number] => 15/229417
[patent_app_country] => US
[patent_app_date] => 2016-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 7568
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15229417
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/229417 | Method for controlling a semiconductor device having CAL latency function | Aug 4, 2016 | Issued |
Array
(
[id] => 13056639
[patent_doc_number] => 10049715
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-08-14
[patent_title] => Semiconductor storage device and method for writing of the same
[patent_app_type] => utility
[patent_app_number] => 15/568811
[patent_app_country] => US
[patent_app_date] => 2016-08-01
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/568811 | Semiconductor storage device and method for writing of the same | Jul 31, 2016 | Issued |
Array
(
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[patent_doc_number] => 10388360
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-20
[patent_title] => Utilization of data stored in an edge section of an array
[patent_app_type] => utility
[patent_app_number] => 15/213755
[patent_app_country] => US
[patent_app_date] => 2016-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/213755 | Utilization of data stored in an edge section of an array | Jul 18, 2016 | Issued |
Array
(
[id] => 11551331
[patent_doc_number] => 09620185
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-04-11
[patent_title] => 'Voltage supply devices generating voltages applied to nonvolatile memory cells'
[patent_app_type] => utility
[patent_app_number] => 15/212017
[patent_app_country] => US
[patent_app_date] => 2016-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/212017 | Voltage supply devices generating voltages applied to nonvolatile memory cells | Jul 14, 2016 | Issued |
Array
(
[id] => 11564474
[patent_doc_number] => 09627066
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-04-18
[patent_title] => 'Non volatile memory cell and memory array'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/210709 | Non volatile memory cell and memory array | Jul 13, 2016 | Issued |
Array
(
[id] => 11539298
[patent_doc_number] => 09613714
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[patent_kind] => B1
[patent_issue_date] => 2017-04-04
[patent_title] => 'One time programming memory cell and memory array for physically unclonable function technology and associated random code generating method'
[patent_app_type] => utility
[patent_app_number] => 15/209079
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/209079 | One time programming memory cell and memory array for physically unclonable function technology and associated random code generating method | Jul 12, 2016 | Issued |
Array
(
[id] => 11125111
[patent_doc_number] => 20160322085
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-03
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/206106
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/206106 | Semiconductor memory device having inverting circuit and controlling method there of | Jul 7, 2016 | Issued |
Array
(
[id] => 12019496
[patent_doc_number] => 09812205
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-07
[patent_title] => 'MTJ-based content addressable memory with measured resistance across matchlines'
[patent_app_type] => utility
[patent_app_number] => 15/205813
[patent_app_country] => US
[patent_app_date] => 2016-07-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/205813 | MTJ-based content addressable memory with measured resistance across matchlines | Jul 7, 2016 | Issued |
Array
(
[id] => 11753192
[patent_doc_number] => 09711210
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-07-18
[patent_title] => 'Low power high performance electrical circuits'
[patent_app_type] => utility
[patent_app_number] => 15/201465
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/201465 | Low power high performance electrical circuits | Jul 2, 2016 | Issued |
Array
(
[id] => 13651499
[patent_doc_number] => 09852065
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-12-26
[patent_title] => Method and apparatus for reducing data program completion overhead in NAND flash
[patent_app_type] => utility
[patent_app_number] => 15/195328
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/195328 | Method and apparatus for reducing data program completion overhead in NAND flash | Jun 27, 2016 | Issued |
Array
(
[id] => 11087442
[patent_doc_number] => 20160284409
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-09-29
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING A MEMORY STRING THAT INCLUDES A TRANSISTOR HAVING A CHARGE STORED THEREIN TO INDICATE THE MEMORY STRING IS DEFECTIVE'
[patent_app_type] => utility
[patent_app_number] => 15/181096
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15181096
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/181096 | Semiconductor memory device having a memory string that includes a transistor having a charge stored therein to indicate the memory string is defective | Jun 12, 2016 | Issued |
Array
(
[id] => 12095300
[patent_doc_number] => 20170352393
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-12-07
[patent_title] => 'EMULATED MULTIPORT MEMORY ELEMENT CIRCUITRY WITH EXCLUSIVE-OR BASED CONTROL CIRCUITRY'
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[patent_app_number] => 15/174460
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/174460 | Emulated multiport memory element circuitry with exclusive-OR based control circuitry | Jun 5, 2016 | Issued |
Array
(
[id] => 11502616
[patent_doc_number] => 20170076801
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[patent_issue_date] => 2017-03-16
[patent_title] => 'MEMORY SYSTEM'
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Array
(
[id] => 11087445
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[patent_title] => 'MEMORY SYSTEM AND DRIVING METHOD THEREOF'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/174183 | Memory system and driving method thereof using at least two zone voltages | Jun 5, 2016 | Issued |
Array
(
[id] => 11876212
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[patent_title] => 'Non-volatile memory with customized control of injection type of disturb during read operations'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/172671 | Non-volatile memory with customized control of injection type of disturb during read operations | Jun 2, 2016 | Issued |
Array
(
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[patent_title] => 'Data independent periodic calibration using per-pin VREF correction technique for single-ended signaling'
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Array
(
[id] => 11599506
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[patent_title] => 'Reciprocal quantum logic (RQL) sense amplifier'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/167317 | Reciprocal quantum logic (RQL) sense amplifier | May 26, 2016 | Issued |
Array
(
[id] => 11070994
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[patent_issue_date] => 2016-09-15
[patent_title] => 'MISMATCH AND NOISE INSENSITIVE STT MRAM'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/163268 | Mismatch and noise insensitive sense amplifier circuit for STT MRAM | May 23, 2016 | Issued |
Array
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[patent_title] => MEMORY READ STABILITY ENHANCEMENT WITH SHORT SEGMENTED BIT LINE ARCHITECTURE
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/162711 | Memory read stability enhancement with short segmented bit line architecture | May 23, 2016 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/153175 | Electronic device | May 11, 2016 | Issued |