Search

Gene Nghia Auduong

Examiner (ID: 2491)

Most Active Art Unit
2827
Art Unit(s)
2827, 2712, 2818, 2825
Total Applications
1939
Issued Applications
1863
Pending Applications
12
Abandoned Applications
67

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12026716 [patent_doc_number] => 20170316815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'CHARGE SHARING BETWEEN MEMORY CELL PLATES USING A CONDUCTIVE PATH' [patent_app_type] => utility [patent_app_number] => 15/141491 [patent_app_country] => US [patent_app_date] => 2016-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 16749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15141491 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/141491
Charge sharing between memory cell plates using a conductive path Apr 27, 2016 Issued
Array ( [id] => 12026716 [patent_doc_number] => 20170316815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'CHARGE SHARING BETWEEN MEMORY CELL PLATES USING A CONDUCTIVE PATH' [patent_app_type] => utility [patent_app_number] => 15/141491 [patent_app_country] => US [patent_app_date] => 2016-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 16749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15141491 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/141491
Charge sharing between memory cell plates using a conductive path Apr 27, 2016 Issued
Array ( [id] => 12026716 [patent_doc_number] => 20170316815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'CHARGE SHARING BETWEEN MEMORY CELL PLATES USING A CONDUCTIVE PATH' [patent_app_type] => utility [patent_app_number] => 15/141491 [patent_app_country] => US [patent_app_date] => 2016-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 16749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15141491 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/141491
Charge sharing between memory cell plates using a conductive path Apr 27, 2016 Issued
Array ( [id] => 12026716 [patent_doc_number] => 20170316815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'CHARGE SHARING BETWEEN MEMORY CELL PLATES USING A CONDUCTIVE PATH' [patent_app_type] => utility [patent_app_number] => 15/141491 [patent_app_country] => US [patent_app_date] => 2016-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 16749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15141491 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/141491
Charge sharing between memory cell plates using a conductive path Apr 27, 2016 Issued
Array ( [id] => 11637626 [patent_doc_number] => 09659605 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-23 [patent_title] => 'Apparatuses and methods for performing corner turn operations using sensing circuitry' [patent_app_type] => utility [patent_app_number] => 15/133861 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 24150 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15133861 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/133861
Apparatuses and methods for performing corner turn operations using sensing circuitry Apr 19, 2016 Issued
Array ( [id] => 12243033 [patent_doc_number] => 20180075896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-15 [patent_title] => 'LOGIC GATE MODULE FOR PERFORMING LOGIC FUNCTIONS COMPRISING A MRAM CELL AND METHOD FOR OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/565505 [patent_app_country] => US [patent_app_date] => 2016-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6438 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15565505 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/565505
Logic gate module for performing logic functions comprising a MRAM cell and method for operating the same Apr 5, 2016 Issued
Array ( [id] => 11452986 [patent_doc_number] => 09576636 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-21 [patent_title] => 'Magnetic memory having ROM-like storage and method therefore' [patent_app_type] => utility [patent_app_number] => 15/087469 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8312 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15087469 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/087469
Magnetic memory having ROM-like storage and method therefore Mar 30, 2016 Issued
Array ( [id] => 11466561 [patent_doc_number] => 09583200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-28 [patent_title] => 'Non-volatile semiconductor memory device and memory system in which write operation is resumed after being suspended for an interrupt operation' [patent_app_type] => utility [patent_app_number] => 15/074190 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 8684 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15074190 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/074190
Non-volatile semiconductor memory device and memory system in which write operation is resumed after being suspended for an interrupt operation Mar 17, 2016 Issued
Array ( [id] => 11739996 [patent_doc_number] => 09704588 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-11 [patent_title] => 'Apparatus and method for preconditioning currents to reduce errors in sensing for non-volatile memory' [patent_app_type] => utility [patent_app_number] => 15/069287 [patent_app_country] => US [patent_app_date] => 2016-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 16928 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15069287 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/069287
Apparatus and method for preconditioning currents to reduce errors in sensing for non-volatile memory Mar 13, 2016 Issued
Array ( [id] => 11564439 [patent_doc_number] => 09627031 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-18 [patent_title] => 'Control methods and memory systems using the same' [patent_app_type] => utility [patent_app_number] => 15/067377 [patent_app_country] => US [patent_app_date] => 2016-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6447 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15067377 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/067377
Control methods and memory systems using the same Mar 10, 2016 Issued
Array ( [id] => 11807045 [patent_doc_number] => 09548127 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-17 [patent_title] => 'Memory system' [patent_app_type] => utility [patent_app_number] => 15/066369 [patent_app_country] => US [patent_app_date] => 2016-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 32 [patent_no_of_words] => 13453 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15066369 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/066369
Memory system Mar 9, 2016 Issued
Array ( [id] => 11417357 [patent_doc_number] => 09564189 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-07 [patent_title] => 'Memory system including semiconductor memory device and program method thereof' [patent_app_type] => utility [patent_app_number] => 15/066559 [patent_app_country] => US [patent_app_date] => 2016-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 9283 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15066559 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/066559
Memory system including semiconductor memory device and program method thereof Mar 9, 2016 Issued
Array ( [id] => 11069630 [patent_doc_number] => 20160266594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'SYSTEM AND METHOD FOR RESIDENTIAL UTILITY MONITORING AND IMPROVEMENT OF ENERGY EFFICIENCY' [patent_app_type] => utility [patent_app_number] => 15/066023 [patent_app_country] => US [patent_app_date] => 2016-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 15752 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15066023 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/066023
SYSTEM AND METHOD FOR RESIDENTIAL UTILITY MONITORING AND IMPROVEMENT OF ENERGY EFFICIENCY Mar 9, 2016 Abandoned
Array ( [id] => 11359935 [patent_doc_number] => 09536591 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-03 [patent_title] => 'Staggered DLL clocking on N-Detect QED to minimize clock command and delay path' [patent_app_type] => utility [patent_app_number] => 15/063229 [patent_app_country] => US [patent_app_date] => 2016-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8537 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15063229 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/063229
Staggered DLL clocking on N-Detect QED to minimize clock command and delay path Mar 6, 2016 Issued
Array ( [id] => 11446084 [patent_doc_number] => 20170047105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-16 [patent_title] => 'RESISTIVE MEMORY WRITE CIRCUITRY WITH BIT LINE DRIVE STRENGTH BASED ON STORAGE CELL LINE RESISTANCE' [patent_app_type] => utility [patent_app_number] => 15/062073 [patent_app_country] => US [patent_app_date] => 2016-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15062073 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/062073
Resistive memory write circuitry with bit line drive strength based on storage cell line resistance Mar 4, 2016 Issued
Array ( [id] => 11062396 [patent_doc_number] => 20160259357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'System and Method For Big Data Geographic Information System Discovery' [patent_app_type] => utility [patent_app_number] => 15/058385 [patent_app_country] => US [patent_app_date] => 2016-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15058385 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/058385
System and method for big data geographic information system discovery Mar 1, 2016 Issued
Array ( [id] => 14426251 [patent_doc_number] => 10317926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Method and apparatus for controlling an electronic device using a rotary control [patent_app_type] => utility [patent_app_number] => 15/053457 [patent_app_country] => US [patent_app_date] => 2016-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 5065 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15053457 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/053457
Method and apparatus for controlling an electronic device using a rotary control Feb 24, 2016 Issued
Array ( [id] => 11049360 [patent_doc_number] => 20160246319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-25 [patent_title] => 'Electric Power Transmission Facility Planning Support System and the Method Thereof' [patent_app_type] => utility [patent_app_number] => 15/050971 [patent_app_country] => US [patent_app_date] => 2016-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6029 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15050971 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/050971
Electric power transmission facility planning support system and the method thereof Feb 22, 2016 Issued
Array ( [id] => 10817547 [patent_doc_number] => 20160163710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/044180 [patent_app_country] => US [patent_app_date] => 2016-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16402 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15044180 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/044180
Semiconductor device Feb 15, 2016 Issued
Array ( [id] => 11042051 [patent_doc_number] => 20160239007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'RUGGED REMOTE UNIVERSAL INPUT/OUTPUT SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/045170 [patent_app_country] => US [patent_app_date] => 2016-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3226 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15045170 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/045170
Apparatus and method for interfacing a plurality of remote devices to a programmable logic controller (PLC) Feb 15, 2016 Issued
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