Gene Nghia Auduong

Array ( [id] => 10131802 [patent_doc_number] => 09165643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-20 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/562904 [patent_app_country] => US [patent_app_date] => 2014-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5703 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14562904 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10275303 [patent_doc_number] => 20150160300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'CELL STATE CALCULATION APPARATUS AND CELL STATE CALCULATION METHOD' [patent_app_type] => utility [patent_app_number] => 14/561716 [patent_app_country] => US [patent_app_date] => 2014-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6715 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14561716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13678779 [patent_doc_number] => 20160378126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => OPERATION TERMINAL, PROGRAM, AND METHOD [patent_app_type] => utility [patent_app_number] => 15/039749 [patent_app_country] => US [patent_app_date] => 2014-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6182 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15039749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9915802 [patent_doc_number] => 20150071007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => '1T1b AND 2T2b FLASH-BASED, DATA-ORIENTED EEPROM DESIGN' [patent_app_type] => utility [patent_app_number] => 14/546294 [patent_app_country] => US [patent_app_date] => 2014-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 23658 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14546294 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10617394 [patent_doc_number] => 09336840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Semiconductor apparatus capable of compensating for data output time and method for controlling the same' [patent_app_type] => utility [patent_app_number] => 14/536011 [patent_app_country] => US [patent_app_date] => 2014-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6420 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14536011 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11346045 [patent_doc_number] => 09530459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-27 [patent_title] => 'Semiconductor memory device including a repeater circuit on main data lines' [patent_app_type] => utility [patent_app_number] => 14/523704 [patent_app_country] => US [patent_app_date] => 2014-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8178 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14523704 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10645425 [patent_doc_number] => 09362300 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-07 [patent_title] => 'Apparatuses and methods for forming multiple decks of memory cells' [patent_app_type] => utility [patent_app_number] => 14/509621 [patent_app_country] => US [patent_app_date] => 2014-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 10583 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14509621 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9802840 [patent_doc_number] => 20150014785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-15 [patent_title] => 'Circuit and System of Using Finfet for building Programmable Resistive Devices' [patent_app_type] => utility [patent_app_number] => 14/500743 [patent_app_country] => US [patent_app_date] => 2014-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 26312 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14500743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12969646 [patent_doc_number] => 09876123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-23 [patent_title] => Non-volatile one-time programmable memory device [patent_app_type] => utility [patent_app_number] => 14/495507 [patent_app_country] => US [patent_app_date] => 2014-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11870 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14495507 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9791238 [patent_doc_number] => 20150003182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE' [patent_app_type] => utility [patent_app_number] => 14/486137 [patent_app_country] => US [patent_app_date] => 2014-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13004 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14486137 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13919761 [patent_doc_number] => 10204003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-12 [patent_title] => Memory device and storage apparatus [patent_app_type] => utility [patent_app_number] => 14/425556 [patent_app_country] => US [patent_app_date] => 2014-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 15186 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14425556 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10590371 [patent_doc_number] => 09311991 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Solid state drive with hybrid storage mode' [patent_app_type] => utility [patent_app_number] => 14/468723 [patent_app_country] => US [patent_app_date] => 2014-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2621 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14468723 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10610724 [patent_doc_number] => 09330761 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-03 [patent_title] => 'Three dimensional stacked nonvolatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 14/460400 [patent_app_country] => US [patent_app_date] => 2014-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9659 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14460400 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10937932 [patent_doc_number] => 20140340953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/451671 [patent_app_country] => US [patent_app_date] => 2014-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 33508 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14451671 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10936530 [patent_doc_number] => 20140339551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/447897 [patent_app_country] => US [patent_app_date] => 2014-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 16376 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14447897 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10502275 [patent_doc_number] => 09230677 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'NAND array hiarchical BL structures for multiple-WL and all-BL simultaneous erase, erase-verify, program, program-verify, and read operations' [patent_app_type] => utility [patent_app_number] => 14/341739 [patent_app_country] => US [patent_app_date] => 2014-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 36 [patent_no_of_words] => 43528 [patent_no_of_claims] => 73 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14341739 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10931220 [patent_doc_number] => 20140334242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-13 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS AND METHOD OF OPERATING USING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/339830 [patent_app_country] => US [patent_app_date] => 2014-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4925 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14339830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10035201 [patent_doc_number] => 09076520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-07 [patent_title] => 'Semiconductor device and driving method thereof' [patent_app_type] => utility [patent_app_number] => 14/333576 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 61 [patent_no_of_words] => 35856 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333576 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10551108 [patent_doc_number] => 09275739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Semiconductor memory device, reading method, and programming method' [patent_app_type] => utility [patent_app_number] => 14/332405 [patent_app_country] => US [patent_app_date] => 2014-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5794 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14332405 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10302420 [patent_doc_number] => 20150187420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/296959 [patent_app_country] => US [patent_app_date] => 2014-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5334 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14296959 [rel_patent_id] =>[rel_patent_doc_number] =>)