
Gene Nghia Auduong
Examiner (ID: 2491)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2827, 2712, 2818, 2825 |
| Total Applications | 1939 |
| Issued Applications | 1863 |
| Pending Applications | 12 |
| Abandoned Applications | 67 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10112060
[patent_doc_number] => 09147478
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-09-29
[patent_title] => 'Semiconductor memory device and method of operating the same'
[patent_app_type] => utility
[patent_app_number] => 14/021669
[patent_app_country] => US
[patent_app_date] => 2013-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 6008
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14021669
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/021669 | Semiconductor memory device and method of operating the same | Sep 8, 2013 | Issued |
Array
(
[id] => 9733364
[patent_doc_number] => 20140269073
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-18
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/021243
[patent_app_country] => US
[patent_app_date] => 2013-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7449
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14021243
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/021243 | SEMICONDUCTOR MEMORY DEVICE | Sep 8, 2013 | Abandoned |
Array
(
[id] => 10035212
[patent_doc_number] => 09076532
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-07-07
[patent_title] => 'Semiconductor memory device and method of testing the same'
[patent_app_type] => utility
[patent_app_number] => 14/021057
[patent_app_country] => US
[patent_app_date] => 2013-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 23
[patent_no_of_words] => 8976
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14021057
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/021057 | Semiconductor memory device and method of testing the same | Sep 8, 2013 | Issued |
Array
(
[id] => 10327159
[patent_doc_number] => 20150212163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-30
[patent_title] => 'DEVICE FOR DETECTING REMAINING BATTERY CAPACITY, BATTERY SYSTEM, METHOD OF DETECTING REMAINING BATTERY CAPACITY AND PROGRAM'
[patent_app_type] => utility
[patent_app_number] => 14/425647
[patent_app_country] => US
[patent_app_date] => 2013-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3651
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14425647
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/425647 | DEVICE FOR DETECTING REMAINING BATTERY CAPACITY, BATTERY SYSTEM, METHOD OF DETECTING REMAINING BATTERY CAPACITY AND PROGRAM | Sep 2, 2013 | Abandoned |
Array
(
[id] => 10984004
[patent_doc_number] => 20160180948
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-23
[patent_title] => 'SEMICONDUCTOR DEVICE FOR MASKING DATA STORED IN TWIN CELL AND OUTPUTTING MASKED DATA'
[patent_app_type] => utility
[patent_app_number] => 14/910645
[patent_app_country] => US
[patent_app_date] => 2013-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 14278
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14910645
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/910645 | Semiconductor device for masking data stored in twin cell and outputting masked data | Aug 21, 2013 | Issued |
Array
(
[id] => 9193454
[patent_doc_number] => 20130332769
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-12-12
[patent_title] => 'IN-FIELD BLOCK RETIRING'
[patent_app_type] => utility
[patent_app_number] => 13/970055
[patent_app_country] => US
[patent_app_date] => 2013-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4967
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13970055
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/970055 | In-field block retiring | Aug 18, 2013 | Issued |
Array
(
[id] => 9390815
[patent_doc_number] => 08687427
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-01
[patent_title] => 'Programming rate identification and control in a solid state memory'
[patent_app_type] => utility
[patent_app_number] => 13/958715
[patent_app_country] => US
[patent_app_date] => 2013-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 9045
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13958715
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/958715 | Programming rate identification and control in a solid state memory | Aug 4, 2013 | Issued |
Array
(
[id] => 9939129
[patent_doc_number] => 08988948
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-24
[patent_title] => 'Memory macro with a voltage keeper'
[patent_app_type] => utility
[patent_app_number] => 13/949664
[patent_app_country] => US
[patent_app_date] => 2013-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6222
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13949664
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/949664 | Memory macro with a voltage keeper | Jul 23, 2013 | Issued |
Array
(
[id] => 10041754
[patent_doc_number] => 09082466
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-07-14
[patent_title] => 'Apparatuses and methods for adjusting deactivation voltages'
[patent_app_type] => utility
[patent_app_number] => 13/949006
[patent_app_country] => US
[patent_app_date] => 2013-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3907
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13949006
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/949006 | Apparatuses and methods for adjusting deactivation voltages | Jul 22, 2013 | Issued |
Array
(
[id] => 9544450
[patent_doc_number] => 20140169097
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-19
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, SYSTEM HAVING THE SAME AND PROGRAM METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/948366
[patent_app_country] => US
[patent_app_date] => 2013-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5572
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13948366
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/948366 | Semiconductor memory device, system having the same and program method thereof | Jul 22, 2013 | Issued |
Array
(
[id] => 9890345
[patent_doc_number] => 08976613
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-10
[patent_title] => 'Differential current sensing scheme for magnetic random access memory'
[patent_app_type] => utility
[patent_app_number] => 13/948432
[patent_app_country] => US
[patent_app_date] => 2013-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 8458
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13948432
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/948432 | Differential current sensing scheme for magnetic random access memory | Jul 22, 2013 | Issued |
Array
(
[id] => 9924625
[patent_doc_number] => 08982599
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-17
[patent_title] => 'Chip die and semiconductor memory device including the same'
[patent_app_type] => utility
[patent_app_number] => 13/948616
[patent_app_country] => US
[patent_app_date] => 2013-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6127
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13948616
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/948616 | Chip die and semiconductor memory device including the same | Jul 22, 2013 | Issued |
Array
(
[id] => 9684309
[patent_doc_number] => 20140241072
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-28
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/948792
[patent_app_country] => US
[patent_app_date] => 2013-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4042
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13948792
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/948792 | Semiconductor memory device | Jul 22, 2013 | Issued |
Array
(
[id] => 9160093
[patent_doc_number] => 20130308370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-21
[patent_title] => 'MEMORY DEVICE AND SYSTEM WITH IMPROVED ERASE OPERATION'
[patent_app_type] => utility
[patent_app_number] => 13/948138
[patent_app_country] => US
[patent_app_date] => 2013-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7539
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13948138
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/948138 | Memory device and system with improved erase operation | Jul 21, 2013 | Issued |
Array
(
[id] => 9811164
[patent_doc_number] => 20150023109
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-01-22
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/947196
[patent_app_country] => US
[patent_app_date] => 2013-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2686
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13947196
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/947196 | Nonvolatile semiconductor memory device | Jul 21, 2013 | Issued |
Array
(
[id] => 9939109
[patent_doc_number] => 08988928
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-24
[patent_title] => 'Operating method of a nonvolatile memory device'
[patent_app_type] => utility
[patent_app_number] => 13/947466
[patent_app_country] => US
[patent_app_date] => 2013-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 7780
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13947466
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/947466 | Operating method of a nonvolatile memory device | Jul 21, 2013 | Issued |
Array
(
[id] => 9810319
[patent_doc_number] => 20150022264
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-01-22
[patent_title] => 'SENSE AMPLIFIER OFFSET VOLTAGE REDUCTION'
[patent_app_type] => utility
[patent_app_number] => 13/947144
[patent_app_country] => US
[patent_app_date] => 2013-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 11472
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13947144
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/947144 | Sense amplifier offset voltage reduction | Jul 21, 2013 | Issued |
Array
(
[id] => 9819333
[patent_doc_number] => 08929129
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-01-06
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/946458
[patent_app_country] => US
[patent_app_date] => 2013-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8662
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13946458
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/946458 | Semiconductor device | Jul 18, 2013 | Issued |
Array
(
[id] => 9684315
[patent_doc_number] => 20140241078
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-28
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/946384
[patent_app_country] => US
[patent_app_date] => 2013-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 8294
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13946384
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/946384 | Semiconductor memory device | Jul 18, 2013 | Issued |
Array
(
[id] => 9329312
[patent_doc_number] => 20140056094
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'WORD-LINE ACTIVATION CIRCUIT, SEMICONDUCTOR MEMORY DEVICE, AND SEMICONDUCTOR INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/946850
[patent_app_country] => US
[patent_app_date] => 2013-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 11482
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13946850
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/946850 | WORD-LINE ACTIVATION CIRCUIT, SEMICONDUCTOR MEMORY DEVICE, AND SEMICONDUCTOR INTEGRATED CIRCUIT | Jul 18, 2013 | Abandoned |