Search

Gene Nghia Auduong

Examiner (ID: 2491)

Most Active Art Unit
2827
Art Unit(s)
2827, 2712, 2818, 2825
Total Applications
1939
Issued Applications
1863
Pending Applications
12
Abandoned Applications
67

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9628100 [patent_doc_number] => 08797788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/449602 [patent_app_country] => US [patent_app_date] => 2012-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 47 [patent_no_of_words] => 16320 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13449602 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/449602
Semiconductor device Apr 17, 2012 Issued
Array ( [id] => 8428560 [patent_doc_number] => 20120250435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF COTNROLING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/431412 [patent_app_country] => US [patent_app_date] => 2012-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 15797 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13431412 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/431412
Semiconductor device and method of controlling the same Mar 26, 2012 Issued
Array ( [id] => 9609905 [patent_doc_number] => 08787084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Semiconductor device and driving method thereof' [patent_app_type] => utility [patent_app_number] => 13/429668 [patent_app_country] => US [patent_app_date] => 2012-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 61 [patent_no_of_words] => 35800 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13429668 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/429668
Semiconductor device and driving method thereof Mar 25, 2012 Issued
Array ( [id] => 8611265 [patent_doc_number] => 20130016577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-17 [patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/425818 [patent_app_country] => US [patent_app_date] => 2012-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8600 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13425818 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/425818
Non-volatile semiconductor memory device and memory system Mar 20, 2012 Issued
Array ( [id] => 9039995 [patent_doc_number] => 20130242633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'Apparatus for ROM Cells' [patent_app_type] => utility [patent_app_number] => 13/423968 [patent_app_country] => US [patent_app_date] => 2012-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6473 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13423968 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/423968
Apparatus for ROM cells Mar 18, 2012 Issued
Array ( [id] => 8910893 [patent_doc_number] => 08482965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-09 [patent_title] => 'Volatile memory elements with soft error upset immunity' [patent_app_type] => utility [patent_app_number] => 13/411436 [patent_app_country] => US [patent_app_date] => 2012-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10023 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13411436 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/411436
Volatile memory elements with soft error upset immunity Mar 1, 2012 Issued
Array ( [id] => 9553845 [patent_doc_number] => 08760905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-24 [patent_title] => 'Electric fuse, semiconductor device, and information writing method of electric fuse' [patent_app_type] => utility [patent_app_number] => 13/406724 [patent_app_country] => US [patent_app_date] => 2012-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 16024 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13406724 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/406724
Electric fuse, semiconductor device, and information writing method of electric fuse Feb 27, 2012 Issued
Array ( [id] => 9346485 [patent_doc_number] => 08665639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Magnetoresistive element and magnetic memory' [patent_app_type] => utility [patent_app_number] => 13/407039 [patent_app_country] => US [patent_app_date] => 2012-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 9960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13407039 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/407039
Magnetoresistive element and magnetic memory Feb 27, 2012 Issued
Array ( [id] => 8369461 [patent_doc_number] => 20120218850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'NON-VOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/406174 [patent_app_country] => US [patent_app_date] => 2012-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3391 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13406174 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/406174
Non-volatile memory device and memory system including the same Feb 26, 2012 Issued
Array ( [id] => 8372436 [patent_doc_number] => 20120221827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => ' ADDRESS DECODING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/406186 [patent_app_country] => US [patent_app_date] => 2012-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4356 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13406186 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/406186
Address decoding device Feb 26, 2012 Issued
Array ( [id] => 8226343 [patent_doc_number] => 20120140549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-07 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/398281 [patent_app_country] => US [patent_app_date] => 2012-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7007 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13398281 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/398281
Nonvolatile semiconductor memory device Feb 15, 2012 Issued
Array ( [id] => 8805811 [patent_doc_number] => RE044230 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2013-05-21 [patent_title] => 'Clock signal generation apparatus for use in semiconductor memory device and its method' [patent_app_type] => reissue [patent_app_number] => 13/367023 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3316 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367023 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/367023
Clock signal generation apparatus for use in semiconductor memory device and its method Feb 5, 2012 Issued
Array ( [id] => 8322726 [patent_doc_number] => 20120195140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/340766 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2226 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340766 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340766
Semiconductor integrated circuit Dec 29, 2011 Issued
Array ( [id] => 8157084 [patent_doc_number] => 20120099377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 13/341123 [patent_app_country] => US [patent_app_date] => 2011-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 11056 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20120099377.pdf [firstpage_image] =>[orig_patent_app_number] => 13341123 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/341123
THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY Dec 29, 2011 Abandoned
Array ( [id] => 9087827 [patent_doc_number] => 08559262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Capacitor power source tamper protection and reliability test' [patent_app_type] => utility [patent_app_number] => 13/340439 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4129 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340439 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340439
Capacitor power source tamper protection and reliability test Dec 28, 2011 Issued
Array ( [id] => 8719295 [patent_doc_number] => 20130070512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/340074 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3513 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340074 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340074
Non-volatile memory device Dec 28, 2011 Issued
Array ( [id] => 9484774 [patent_doc_number] => 08730732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Semiconductor memory device and method of fabrication and operation' [patent_app_type] => utility [patent_app_number] => 13/340577 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4644 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340577 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340577
Semiconductor memory device and method of fabrication and operation Dec 28, 2011 Issued
Array ( [id] => 9525767 [patent_doc_number] => 08750051 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-06-10 [patent_title] => 'Systems and methods for providing high voltage to memory devices' [patent_app_type] => utility [patent_app_number] => 13/340248 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 10099 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340248 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340248
Systems and methods for providing high voltage to memory devices Dec 28, 2011 Issued
Array ( [id] => 9403199 [patent_doc_number] => 08693259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-08 [patent_title] => 'Wordline-to-wordline stress configuration' [patent_app_type] => utility [patent_app_number] => 13/340437 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5515 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340437 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340437
Wordline-to-wordline stress configuration Dec 28, 2011 Issued
Array ( [id] => 9114605 [patent_doc_number] => 08570790 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-29 [patent_title] => 'Memory devices and methods for high random transaction rate' [patent_app_type] => utility [patent_app_number] => 13/340246 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 41 [patent_no_of_words] => 12920 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340246 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/340246
Memory devices and methods for high random transaction rate Dec 28, 2011 Issued
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