Gene Nghia Auduong

Array ( [id] => 7783201 [patent_doc_number] => 20120044757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-23 [patent_title] => 'MEMORY USING A PLURALITY OF DIODES AS PROGRAM SELECTORS WITH AT LEAST ONE BEING A POLYSILICON DIODE' [patent_app_type] => utility [patent_app_number] => 13/026692 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 15796 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20120044757.pdf [firstpage_image] =>[orig_patent_app_number] => 13026692 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6140476 [patent_doc_number] => 20110128774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/021398 [patent_app_country] => US [patent_app_date] => 2011-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7010 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20110128774.pdf [firstpage_image] =>[orig_patent_app_number] => 13021398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7743540 [patent_doc_number] => 08107282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-31 [patent_title] => 'Asymmetric write current compensation' [patent_app_type] => utility [patent_app_number] => 13/016445 [patent_app_country] => US [patent_app_date] => 2011-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6033 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/107/08107282.pdf [firstpage_image] =>[orig_patent_app_number] => 13016445 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8307166 [patent_doc_number] => 08228717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'Spin current generator for STT-MRAM or other spintronics applications' [patent_app_type] => utility [patent_app_number] => 13/012661 [patent_app_country] => US [patent_app_date] => 2011-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4690 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13012661 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8307175 [patent_doc_number] => 08228721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-24 [patent_title] => 'Refresh circuitry for phase change memory' [patent_app_type] => utility [patent_app_number] => 13/011691 [patent_app_country] => US [patent_app_date] => 2011-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13011691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5942532 [patent_doc_number] => 20110103152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/004926 [patent_app_country] => US [patent_app_date] => 2011-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4088 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20110103152.pdf [firstpage_image] =>[orig_patent_app_number] => 13004926 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8847723 [patent_doc_number] => 08456913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Semiconductor memory apparatus and method for controlling programming current pulse' [patent_app_type] => utility [patent_app_number] => 12/983050 [patent_app_country] => US [patent_app_date] => 2010-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4647 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983050 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8847743 [patent_doc_number] => 08456933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Semiconductor memory apparatus and method for generating programming current pulse' [patent_app_type] => utility [patent_app_number] => 12/983058 [patent_app_country] => US [patent_app_date] => 2010-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 5675 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8847742 [patent_doc_number] => 08456932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 12/982998 [patent_app_country] => US [patent_app_date] => 2010-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 8212 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12982998 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8654268 [patent_doc_number] => 08374024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'System for handling data in a semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 12/982996 [patent_app_country] => US [patent_app_date] => 2010-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3142 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12982996 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8654267 [patent_doc_number] => 08374023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 12/982972 [patent_app_country] => US [patent_app_date] => 2010-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 9297 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12982972 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6157369 [patent_doc_number] => 20110157992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'APPARATUS, SYSTEM, AND METHOD FOR BIASING DATA IN A SOLID-STATE STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/981394 [patent_app_country] => US [patent_app_date] => 2010-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 32417 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20110157992.pdf [firstpage_image] =>[orig_patent_app_number] => 12981394 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6036330 [patent_doc_number] => 20110089426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'Integrated Circuit, Semiconductor Device Comprising the Same, Electronic Device Having the Same, and Driving Method of the Same' [patent_app_type] => utility [patent_app_number] => 12/977143 [patent_app_country] => US [patent_app_date] => 2010-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16969 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20110089426.pdf [firstpage_image] =>[orig_patent_app_number] => 12977143 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8579262 [patent_doc_number] => 08345482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Methods for segmented programming and memory devices' [patent_app_type] => utility [patent_app_number] => 12/968714 [patent_app_country] => US [patent_app_date] => 2010-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5075 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12968714 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6029412 [patent_doc_number] => 20110080780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'Method for Programming a Multilevel Phase Change Memory Device' [patent_app_type] => utility [patent_app_number] => 12/969526 [patent_app_country] => US [patent_app_date] => 2010-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4820 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20110080780.pdf [firstpage_image] =>[orig_patent_app_number] => 12969526 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7714073 [patent_doc_number] => 20120005397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'SENSE AMPLIFIER AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/962254 [patent_app_country] => US [patent_app_date] => 2010-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4723 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20120005397.pdf [firstpage_image] =>[orig_patent_app_number] => 12962254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5974503 [patent_doc_number] => 20110069550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-24 [patent_title] => 'THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 12/953690 [patent_app_country] => US [patent_app_date] => 2010-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 10367 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20110069550.pdf [firstpage_image] =>[orig_patent_app_number] => 12953690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7743561 [patent_doc_number] => 08107292 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-31 [patent_title] => 'Three dimensional stacked nonvolatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 12/953193 [patent_app_country] => US [patent_app_date] => 2010-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 28 [patent_no_of_words] => 11027 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 418 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/107/08107292.pdf [firstpage_image] =>[orig_patent_app_number] => 12953193 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7556460 [patent_doc_number] => 08068364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-29 [patent_title] => 'Three dimensional stacked nonvolatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 12/950509 [patent_app_country] => US [patent_app_date] => 2010-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9548 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/068/08068364.pdf [firstpage_image] =>[orig_patent_app_number] => 12950509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8195322 [patent_doc_number] => 20120120711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'MEMORY SYSTEM WITH REVERSIBLE RESISTIVITY-SWITCHING USING PULSES OF ALTERNATRIE POLARITY' [patent_app_type] => utility [patent_app_number] => 12/948388 [patent_app_country] => US [patent_app_date] => 2010-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10299 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20120120711.pdf [firstpage_image] =>[orig_patent_app_number] => 12948388 [rel_patent_id] =>[rel_patent_doc_number] =>)