Gene Nghia Auduong

Array ( [id] => 6180903 [patent_doc_number] => 20110122670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/947846 [patent_app_country] => US [patent_app_date] => 2010-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 33900 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20110122670.pdf [firstpage_image] =>[orig_patent_app_number] => 12947846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8195342 [patent_doc_number] => 20120120734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'DOUBLE LINE ACCESS TO A FIFO' [patent_app_type] => utility [patent_app_number] => 12/948008 [patent_app_country] => US [patent_app_date] => 2010-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4386 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20120120734.pdf [firstpage_image] =>[orig_patent_app_number] => 12948008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5999323 [patent_doc_number] => 20110116334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/948302 [patent_app_country] => US [patent_app_date] => 2010-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20110116334.pdf [firstpage_image] =>[orig_patent_app_number] => 12948302 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8847741 [patent_doc_number] => 08456931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Data transmission device' [patent_app_type] => utility [patent_app_number] => 12/947298 [patent_app_country] => US [patent_app_date] => 2010-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 7600 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12947298 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8364172 [patent_doc_number] => 08253244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-28 [patent_title] => 'Semiconductor package having memory devices stacked on logic device' [patent_app_type] => utility [patent_app_number] => 12/946141 [patent_app_country] => US [patent_app_date] => 2010-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4113 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12946141 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8726924 [patent_doc_number] => 08406059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Nonvolatile semiconductor memory devices, data updating methods thereof, and nonvolatile semiconductor memory systems' [patent_app_type] => utility [patent_app_number] => 12/945230 [patent_app_country] => US [patent_app_date] => 2010-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3912 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12945230 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6069259 [patent_doc_number] => 20110044108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'FLASH MEMORY DEVICE AND PROGRAM METHOD OF FLASH MEMORY DEVICE USING DIFFERENT VOLTAGES' [patent_app_type] => utility [patent_app_number] => 12/939251 [patent_app_country] => US [patent_app_date] => 2010-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6698 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20110044108.pdf [firstpage_image] =>[orig_patent_app_number] => 12939251 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5948353 [patent_doc_number] => 20110107005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/910428 [patent_app_country] => US [patent_app_date] => 2010-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7963 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20110107005.pdf [firstpage_image] =>[orig_patent_app_number] => 12910428 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6181083 [patent_doc_number] => 20110122711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'BITLINE PRECHARGE VOLTAGE GENERATOR, SEMICONDUCTOR MEMORY DEVICE COMPRISING SAME, AND METHOD OF TRIMMING BITLINE PRECHARGE VOLTAGE' [patent_app_type] => utility [patent_app_number] => 12/904302 [patent_app_country] => US [patent_app_date] => 2010-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6885 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20110122711.pdf [firstpage_image] =>[orig_patent_app_number] => 12904302 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8436822 [patent_doc_number] => 08284597 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-09 [patent_title] => 'Diode memory' [patent_app_type] => utility [patent_app_number] => 12/904792 [patent_app_country] => US [patent_app_date] => 2010-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 36 [patent_no_of_words] => 6955 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12904792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8665991 [patent_doc_number] => 08379458 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-02-19 [patent_title] => 'Semiconductor device and structure' [patent_app_type] => utility [patent_app_number] => 12/904124 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 314 [patent_figures_cnt] => 318 [patent_no_of_words] => 35926 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12904124 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6121713 [patent_doc_number] => 20110084753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'ELECTRICAL, CONTROL METHOD, SYSTEM AND APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/903858 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2063 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20110084753.pdf [firstpage_image] =>[orig_patent_app_number] => 12903858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8665991 [patent_doc_number] => 08379458 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-02-19 [patent_title] => 'Semiconductor device and structure' [patent_app_type] => utility [patent_app_number] => 12/904124 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 314 [patent_figures_cnt] => 318 [patent_no_of_words] => 35926 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12904124 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7650061 [patent_doc_number] => 20110299330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'PSEUDO PAGE MODE MEMORY ARCHITECTURE AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/903152 [patent_app_country] => US [patent_app_date] => 2010-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7182 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0299/20110299330.pdf [firstpage_image] =>[orig_patent_app_number] => 12903152 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6194582 [patent_doc_number] => 20110026336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-03 [patent_title] => 'Data Storage Using Read-Mask-Write Operation' [patent_app_type] => utility [patent_app_number] => 12/903023 [patent_app_country] => US [patent_app_date] => 2010-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3151 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20110026336.pdf [firstpage_image] =>[orig_patent_app_number] => 12903023 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8125267 [patent_doc_number] => 20120087184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'Magnetic Random Access Memory (MRAM) Layout with Uniform Pattern' [patent_app_type] => utility [patent_app_number] => 12/901074 [patent_app_country] => US [patent_app_date] => 2010-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4222 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20120087184.pdf [firstpage_image] =>[orig_patent_app_number] => 12901074 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4635764 [patent_doc_number] => 08014220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'Current mode data sensing and propagation using voltage amplifier' [patent_app_type] => utility [patent_app_number] => 12/889104 [patent_app_country] => US [patent_app_date] => 2010-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4015 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/014/08014220.pdf [firstpage_image] =>[orig_patent_app_number] => 12889104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9240723 [patent_doc_number] => 08605520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Replaceable, precise-tracking reference lines for memory products' [patent_app_type] => utility [patent_app_number] => 12/924184 [patent_app_country] => US [patent_app_date] => 2010-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2395 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12924184 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8216654 [patent_doc_number] => 08194439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-05 [patent_title] => 'Magnetic random access memories and methods of operating the same' [patent_app_type] => utility [patent_app_number] => 12/923376 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 14568 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/194/08194439.pdf [firstpage_image] =>[orig_patent_app_number] => 12923376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6093239 [patent_doc_number] => 20110002171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'MEMORY WITH OUTPUT CONTROL' [patent_app_type] => utility [patent_app_number] => 12/882931 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 15494 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20110002171.pdf [firstpage_image] =>[orig_patent_app_number] => 12882931 [rel_patent_id] =>[rel_patent_doc_number] =>)