Gene Nghia Auduong

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Array ( [id] => 8330107 [patent_doc_number] => 08238177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/662040 [patent_app_country] => US [patent_app_date] => 2010-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7894 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12662040 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8556683 [patent_doc_number] => 08331161 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Semiconductor memory device having swap function for data output pads' [patent_app_type] => utility [patent_app_number] => 12/662018 [patent_app_country] => US [patent_app_date] => 2010-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5282 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12662018 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8353525 [patent_doc_number] => 08248860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => 'Memory device using a variable resistive element' [patent_app_type] => utility [patent_app_number] => 12/659840 [patent_app_country] => US [patent_app_date] => 2010-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 7576 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12659840 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6464643 [patent_doc_number] => 20100284221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'Nonvolatile memory device and method for controlling word line or bit line thereof' [patent_app_type] => utility [patent_app_number] => 12/659690 [patent_app_country] => US [patent_app_date] => 2010-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6677 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20100284221.pdf [firstpage_image] =>[orig_patent_app_number] => 12659690 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 8534721 [patent_doc_number] => 08310880 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Virtual channel support in a nonvolatile memory controller' [patent_app_type] => utility [patent_app_number] => 12/718944 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 15327 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12718944 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8271728 [patent_doc_number] => 08213248 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Semiconductor memory device having improved local input/output line precharge scheme' [patent_app_type] => utility [patent_app_number] => 12/659328 [patent_app_country] => US [patent_app_date] => 2010-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5029 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12659328 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8295789 [patent_doc_number] => 08223576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-17 [patent_title] => 'Regulators regulating charge pump and memory circuits thereof' [patent_app_type] => utility [patent_app_number] => 12/716430 [patent_app_country] => US [patent_app_date] => 2010-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5019 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12716430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6627844 [patent_doc_number] => 20100226163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-09 [patent_title] => 'Method of resistive memory programming and associated devices and materials' [patent_app_type] => utility [patent_app_number] => 12/660782 [patent_app_country] => US [patent_app_date] => 2010-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5838 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20100226163.pdf [firstpage_image] =>[orig_patent_app_number] => 12660782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6337391 [patent_doc_number] => 20100328995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'METHODS AND APPARATUS FOR REDUCING DEFECT BITS IN PHASE CHANGE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/715802 [patent_app_country] => US [patent_app_date] => 2010-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11594 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0328/20100328995.pdf [firstpage_image] =>[orig_patent_app_number] => 12715802 [rel_patent_id] =>[rel_patent_doc_number] =>)

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Array ( [id] => 6520154 [patent_doc_number] => 20100220513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'Bi-Directional Resistive Memory Devices and Related Memory Systems and Methods of Writing Data' [patent_app_type] => utility [patent_app_number] => 12/715742 [patent_app_country] => US [patent_app_date] => 2010-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8966 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20100220513.pdf [firstpage_image] =>[orig_patent_app_number] => 12715742 [rel_patent_id] =>[rel_patent_doc_number] =>)

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