Gene Nghia Auduong

Array ( [id] => 8106531 [patent_doc_number] => 08154912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-10 [patent_title] => 'Volatile memory elements with soft error upset immunity' [patent_app_type] => utility [patent_app_number] => 12/686597 [patent_app_country] => US [patent_app_date] => 2010-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9957 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/154/08154912.pdf [firstpage_image] =>[orig_patent_app_number] => 12686597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6433142 [patent_doc_number] => 20100103726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'PHASE CHANGE MEMORY DEVICES AND SYSTEMS, AND RELATED PROGRAMMING METHODS' [patent_app_type] => utility [patent_app_number] => 12/652842 [patent_app_country] => US [patent_app_date] => 2010-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 57 [patent_no_of_words] => 24070 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20100103726.pdf [firstpage_image] =>[orig_patent_app_number] => 12652842 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6180972 [patent_doc_number] => 20110122684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'VOLTAGE COMPENSATION CIRCUIT, MULTI-LEVEL MEMORY DEVICE WITH THE SAME, AND VOLTAGE COMPENSATION METHOD FOR READING THE MULTI-LEVEL MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/650544 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4588 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20110122684.pdf [firstpage_image] =>[orig_patent_app_number] => 12650544 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6157432 [patent_doc_number] => 20110158024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/650594 [patent_app_country] => US [patent_app_date] => 2009-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9201 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20110158024.pdf [firstpage_image] =>[orig_patent_app_number] => 12650594 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6384892 [patent_doc_number] => 20100302841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'PHASE CHANGE MEMORY APPARATUS AND TEST CIRCUIT THEREFOR' [patent_app_type] => utility [patent_app_number] => 12/650518 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2396 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20100302841.pdf [firstpage_image] =>[orig_patent_app_number] => 12650518 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4635751 [patent_doc_number] => 08014207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'Nonvolatile memory device and method of operating the same' [patent_app_type] => utility [patent_app_number] => 12/649742 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4699 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/014/08014207.pdf [firstpage_image] =>[orig_patent_app_number] => 12649742 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8284241 [patent_doc_number] => 08218354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-10 [patent_title] => 'SRAM word-line coupling noise restriction' [patent_app_type] => utility [patent_app_number] => 12/649806 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 2030 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12649806 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6140543 [patent_doc_number] => 20110128800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/650380 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3215 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20110128800.pdf [firstpage_image] =>[orig_patent_app_number] => 12650380 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8245961 [patent_doc_number] => 08203895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Semiconductor memory apparatus and driving method using the same' [patent_app_type] => utility [patent_app_number] => 12/650446 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2697 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/203/08203895.pdf [firstpage_image] =>[orig_patent_app_number] => 12650446 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6157346 [patent_doc_number] => 20110157981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'FLASH MEMORY SYSTEM HAVING CROSS-COUPLING COMPENSATION DURING READ OPERATION' [patent_app_type] => utility [patent_app_number] => 12/650270 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7545 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20110157981.pdf [firstpage_image] =>[orig_patent_app_number] => 12650270 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6491976 [patent_doc_number] => 20100214865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS AND METHOD OF CONTROLLING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/650412 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2549 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20100214865.pdf [firstpage_image] =>[orig_patent_app_number] => 12650412 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6157426 [patent_doc_number] => 20110158020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'CIRCUIT AND METHOD FOR CONTROLLING PRECHARGE IN SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/650536 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3869 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20110158020.pdf [firstpage_image] =>[orig_patent_app_number] => 12650536 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6316544 [patent_doc_number] => 20100195400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/647593 [patent_app_country] => US [patent_app_date] => 2009-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12075 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20100195400.pdf [firstpage_image] =>[orig_patent_app_number] => 12647593 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6403653 [patent_doc_number] => 20100165731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'MEMORY DEVICE AND OPERATING METHOD' [patent_app_type] => utility [patent_app_number] => 12/647583 [patent_app_country] => US [patent_app_date] => 2009-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4946 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0165/20100165731.pdf [firstpage_image] =>[orig_patent_app_number] => 12647583 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8330093 [patent_doc_number] => 08238163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 12/647571 [patent_app_country] => US [patent_app_date] => 2009-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 7239 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12647571 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6157345 [patent_doc_number] => 20110157980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'TECHNIQUE TO REDUCE FG-FG INTERFERENCE IN MULTI BIT NAND FLASH MEMORY IN CASE OF ADJACENT PAGES NOT FULLY PROGRAMMED' [patent_app_type] => utility [patent_app_number] => 12/647317 [patent_app_country] => US [patent_app_date] => 2009-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4482 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20110157980.pdf [firstpage_image] =>[orig_patent_app_number] => 12647317 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8030863 [patent_doc_number] => 08144521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-27 [patent_title] => 'Method of operating nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 12/647269 [patent_app_country] => US [patent_app_date] => 2009-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3491 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/144/08144521.pdf [firstpage_image] =>[orig_patent_app_number] => 12647269 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6403892 [patent_doc_number] => 20100165769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE HAVING AUTO-PRECHARGE FUNCTION' [patent_app_type] => utility [patent_app_number] => 12/647277 [patent_app_country] => US [patent_app_date] => 2009-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4896 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0165/20100165769.pdf [firstpage_image] =>[orig_patent_app_number] => 12647277 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6589198 [patent_doc_number] => 20100097851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-22 [patent_title] => 'METHOD FOR PROGRAMMING A MULTILEVEL PHASE CHANGE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/639789 [patent_app_country] => US [patent_app_date] => 2009-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4785 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20100097851.pdf [firstpage_image] =>[orig_patent_app_number] => 12639789 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4640732 [patent_doc_number] => 08018762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-13 [patent_title] => 'Information recording and reproducing apparatus' [patent_app_type] => utility [patent_app_number] => 12/636606 [patent_app_country] => US [patent_app_date] => 2009-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 33 [patent_no_of_words] => 15581 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/018/08018762.pdf [firstpage_image] =>[orig_patent_app_number] => 12636606 [rel_patent_id] =>[rel_patent_doc_number] =>)