Search

Geoffrey S. Evans

Examiner (ID: 10565, Phone: (571)272-1174 , Office: P/3742 )

Most Active Art Unit
1725
Art Unit(s)
3742, 1742, 1725, 2831, 2104, 2106, 3761, 1793, 2103
Total Applications
3744
Issued Applications
3191
Pending Applications
123
Abandoned Applications
441

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18081356 [patent_doc_number] => 20220406968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => METHOD FOR MANUFACTURING A NATIVE EMISSION MATRIX [patent_app_type] => utility [patent_app_number] => 17/806437 [patent_app_country] => US [patent_app_date] => 2022-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6789 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806437 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/806437
Method for manufacturing a native emission matrix having doped and porosified In(x)GaN Jun 9, 2022 Issued
Array ( [id] => 18821152 [patent_doc_number] => 20230395493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => ON PACKAGE INTERCONNECT ARCHITECTURE FOR HIGH-SPEED MEMORY [patent_app_type] => utility [patent_app_number] => 17/833608 [patent_app_country] => US [patent_app_date] => 2022-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17833608 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/833608
ON PACKAGE INTERCONNECT ARCHITECTURE FOR HIGH-SPEED MEMORY Jun 5, 2022 Pending
Array ( [id] => 17886709 [patent_doc_number] => 20220302187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => Semiconductor Image Sensor Device Having Back Side Illuminated Image Sensors with Embedded Color Filters [patent_app_type] => utility [patent_app_number] => 17/833217 [patent_app_country] => US [patent_app_date] => 2022-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17833217 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/833217
Semiconductor image sensor device having back side illuminated image sensors with embedded color filters Jun 5, 2022 Issued
Array ( [id] => 18821109 [patent_doc_number] => 20230395450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => REINFORCED STRUCTURE WITH CAPPING LAYER AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/829534 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16928 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17829534 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/829534
REINFORCED STRUCTURE WITH CAPPING LAYER AND METHODS OF FORMING THE SAME May 31, 2022 Pending
Array ( [id] => 19018075 [patent_doc_number] => 11925037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Microelectronic devices with isolation trenches in upper portions of tiered stacks, and related methods [patent_app_type] => utility [patent_app_number] => 17/804958 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13832 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17804958 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/804958
Microelectronic devices with isolation trenches in upper portions of tiered stacks, and related methods May 31, 2022 Issued
Array ( [id] => 18112962 [patent_doc_number] => 20230005842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => SEMICONDUCTOR PACKAGE INCLUDING OUTER CONDUCTIVE PLATE [patent_app_type] => utility [patent_app_number] => 17/828799 [patent_app_country] => US [patent_app_date] => 2022-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17828799 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/828799
Semiconductor package including outer conductive plate May 30, 2022 Issued
Array ( [id] => 18324413 [patent_doc_number] => 20230122541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING WRITE TRANSISTOR AND READ TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/825133 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11530 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825133 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/825133
Semiconductor device including write transistor and read transistor having read word line and read bit line at opposite ends of read channel layer May 25, 2022 Issued
Array ( [id] => 20130551 [patent_doc_number] => 12372862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Reticle having hexagonal patterns in a honeycomb arrangement [patent_app_type] => utility [patent_app_number] => 17/824151 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 28 [patent_no_of_words] => 2195 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824151 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/824151
Reticle having hexagonal patterns in a honeycomb arrangement May 24, 2022 Issued
Array ( [id] => 18812863 [patent_doc_number] => 20230387200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/824329 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9996 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824329 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/824329
Semiconductor structure having second contact structure over second side of first S/D structure May 24, 2022 Issued
Array ( [id] => 19951344 [patent_doc_number] => 12322715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Method of forming integrated chip structure having slotted bond pad in stacked wafer structure [patent_app_type] => utility [patent_app_number] => 17/750706 [patent_app_country] => US [patent_app_date] => 2022-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 55 [patent_no_of_words] => 8675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750706 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/750706
Method of forming integrated chip structure having slotted bond pad in stacked wafer structure May 22, 2022 Issued
Array ( [id] => 20777022 [patent_doc_number] => 12660721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Reinforced substrates to mitigate underflow stress and package warp and methods of making the same [patent_app_type] => utility [patent_app_number] => 17/750429 [patent_app_country] => US [patent_app_date] => 2022-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 5343 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750429 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/750429
Reinforced substrates to mitigate underflow stress and package warp and methods of making the same May 22, 2022 Issued
Array ( [id] => 18338550 [patent_doc_number] => 20230130499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => COLOR CONVERSION SUBSTRATE AND DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/747125 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11266 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747125 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/747125
Color conversion substrate having side light blocking member and display device including the same May 17, 2022 Issued
Array ( [id] => 18507515 [patent_doc_number] => 11705341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Method of fabricating a semiconductor package having redistribution patterns including seed patterns and seed layers [patent_app_type] => utility [patent_app_number] => 17/741751 [patent_app_country] => US [patent_app_date] => 2022-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 50 [patent_no_of_words] => 17475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17741751 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/741751
Method of fabricating a semiconductor package having redistribution patterns including seed patterns and seed layers May 10, 2022 Issued
Array ( [id] => 20082599 [patent_doc_number] => 12356699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Method for forming semiconductor device structure with second spacer over second sidewall of fin structure [patent_app_type] => utility [patent_app_number] => 17/741948 [patent_app_country] => US [patent_app_date] => 2022-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 3914 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17741948 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/741948
Method for forming semiconductor device structure with second spacer over second sidewall of fin structure May 10, 2022 Issued
Array ( [id] => 17833774 [patent_doc_number] => 20220271078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => SOLID-STATE IMAGING ELEMENT [patent_app_type] => utility [patent_app_number] => 17/739281 [patent_app_country] => US [patent_app_date] => 2022-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21049 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17739281 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/739281
Solid-state imaging element having partition wall disposed between optical filters May 8, 2022 Issued
Array ( [id] => 17810902 [patent_doc_number] => 20220262737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => SEMICONDUCTOR DEVICE, ELECTRONIC MODULE, ELECTRONIC APPARATUS, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/736587 [patent_app_country] => US [patent_app_date] => 2022-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17736587 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/736587
Semiconductor device, electronic module and electronic apparatus each having stacked embedded active components in a multilayer wiring board May 3, 2022 Issued
Array ( [id] => 18757779 [patent_doc_number] => 20230361242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => DRY TREATMENT FOR SURFACE LOSS REMOVAL IN MICRO-LED STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/736843 [patent_app_country] => US [patent_app_date] => 2022-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17736843 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/736843
DRY TREATMENT FOR SURFACE LOSS REMOVAL IN MICRO-LED STRUCTURES May 3, 2022 Pending
Array ( [id] => 19844123 [patent_doc_number] => 12256539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => One-time-programmable memory devices having first transistor, second transistor, and resistor in series [patent_app_type] => utility [patent_app_number] => 17/721658 [patent_app_country] => US [patent_app_date] => 2022-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 10312 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17721658 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/721658
One-time-programmable memory devices having first transistor, second transistor, and resistor in series Apr 14, 2022 Issued
Array ( [id] => 19886916 [patent_doc_number] => 12272647 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => 3D stacked chip that shares power rails [patent_app_type] => utility [patent_app_number] => 17/720642 [patent_app_country] => US [patent_app_date] => 2022-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 6179 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17720642 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/720642
3D stacked chip that shares power rails Apr 13, 2022 Issued
Array ( [id] => 19237649 [patent_doc_number] => 20240194844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => DISPLAY DEVICE COMPRISING SEMICONDUCTOR LIGHT EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 18/286491 [patent_app_country] => US [patent_app_date] => 2022-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18286491 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/286491
DISPLAY DEVICE COMPRISING SEMICONDUCTOR LIGHT EMITTING DEVICE Apr 11, 2022 Pending
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