
George B. Davis
Examiner (ID: 14843)
| Most Active Art Unit | 2308 |
| Art Unit(s) | 2308, 2122, 2121, 2129, 2787, 2309, 2762 |
| Total Applications | 835 |
| Issued Applications | 652 |
| Pending Applications | 39 |
| Abandoned Applications | 144 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1603387
[patent_doc_number] => 06433569
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-13
[patent_title] => 'Apparatus for testing an integrated circuit in an oven during burn-in'
[patent_app_type] => B1
[patent_app_number] => 09/689997
[patent_app_country] => US
[patent_app_date] => 2000-10-12
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/433/06433569.pdf
[firstpage_image] =>[orig_patent_app_number] => 09689997
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/689997 | Apparatus for testing an integrated circuit in an oven during burn-in | Oct 11, 2000 | Issued |
Array
(
[id] => 7646925
[patent_doc_number] => 06476593
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[patent_kind] => B1
[patent_issue_date] => 2002-11-05
[patent_title] => 'Method and circuit for compensation control of offset voltages of a radio receiving circuit integrated in a circuit module'
[patent_app_type] => B1
[patent_app_number] => 09/680050
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 09680050
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/680050 | Method and circuit for compensation control of offset voltages of a radio receiving circuit integrated in a circuit module | Oct 2, 2000 | Issued |
Array
(
[id] => 1448587
[patent_doc_number] => 06369599
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[patent_kind] => B1
[patent_issue_date] => 2002-04-09
[patent_title] => 'Circuit and a method for configuring pad connections in an integrated device'
[patent_app_type] => B1
[patent_app_number] => 09/663967
[patent_app_country] => US
[patent_app_date] => 2000-09-19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/663967 | Circuit and a method for configuring pad connections in an integrated device | Sep 18, 2000 | Issued |
Array
(
[id] => 1285306
[patent_doc_number] => 06642707
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-04
[patent_title] => 'High-speed peaking circuit for characteristic impedance control'
[patent_app_type] => B1
[patent_app_number] => 09/661073
[patent_app_country] => US
[patent_app_date] => 2000-09-13
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/661073 | High-speed peaking circuit for characteristic impedance control | Sep 12, 2000 | Issued |
Array
(
[id] => 1536968
[patent_doc_number] => 06489794
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[patent_issue_date] => 2002-12-03
[patent_title] => 'High speed pass through test system and test method for electronic modules'
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[patent_app_number] => 09/653148
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/653148 | High speed pass through test system and test method for electronic modules | Aug 30, 2000 | Issued |
Array
(
[id] => 1456134
[patent_doc_number] => 06462568
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[patent_issue_date] => 2002-10-08
[patent_title] => 'Conductive polymer contact system and test method for semiconductor components'
[patent_app_type] => B1
[patent_app_number] => 09/652826
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/652826 | Conductive polymer contact system and test method for semiconductor components | Aug 30, 2000 | Issued |
Array
(
[id] => 1237579
[patent_doc_number] => 06690184
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[patent_issue_date] => 2004-02-10
[patent_title] => 'Air socket for testing integrated circuits'
[patent_app_type] => B1
[patent_app_number] => 09/653111
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/653111 | Air socket for testing integrated circuits | Aug 30, 2000 | Issued |
Array
(
[id] => 1381919
[patent_doc_number] => 06563299
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[patent_kind] => B1
[patent_issue_date] => 2003-05-13
[patent_title] => 'Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer'
[patent_app_type] => B1
[patent_app_number] => 09/650798
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 09650798
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/650798 | Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer | Aug 29, 2000 | Issued |
Array
(
[id] => 1436916
[patent_doc_number] => 06356095
[patent_country] => US
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[patent_issue_date] => 2002-03-12
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => B1
[patent_app_number] => 09/649081
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/649081 | Semiconductor integrated circuit | Aug 27, 2000 | Issued |
Array
(
[id] => 1315500
[patent_doc_number] => 06614246
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[patent_issue_date] => 2003-09-02
[patent_title] => 'Probe structure'
[patent_app_type] => B1
[patent_app_number] => 09/648452
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Array
(
[id] => 1456156
[patent_doc_number] => 06462575
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[patent_issue_date] => 2002-10-08
[patent_title] => 'Method and system for wafer level testing and burning-in semiconductor components'
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[patent_app_number] => 09/650342
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Array
(
[id] => 1591585
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[patent_title] => 'Test system, test contactor, and test method for electronic modules'
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Array
(
[id] => 7630868
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[patent_title] => 'Dual probe test structures for semiconductor integrated circuits'
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Array
(
[id] => 1519408
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[patent_title] => 'High speed multifunction testing and calibration of electronic electricity meters'
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Array
(
[id] => 1422977
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[patent_title] => 'Short-circuit failure analyzing method and apparatus'
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Array
(
[id] => 1487240
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[patent_title] => 'Probe needle for probe card'
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Array
(
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Array
(
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Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/636513 | Method and apparatus for testing a semiconductor package | Aug 9, 2000 | Issued |