Search

George B. Davis

Examiner (ID: 14843)

Most Active Art Unit
2308
Art Unit(s)
2308, 2122, 2121, 2129, 2787, 2309, 2762
Total Applications
835
Issued Applications
652
Pending Applications
39
Abandoned Applications
144

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1603387 [patent_doc_number] => 06433569 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Apparatus for testing an integrated circuit in an oven during burn-in' [patent_app_type] => B1 [patent_app_number] => 09/689997 [patent_app_country] => US [patent_app_date] => 2000-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 6346 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/433/06433569.pdf [firstpage_image] =>[orig_patent_app_number] => 09689997 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/689997
Apparatus for testing an integrated circuit in an oven during burn-in Oct 11, 2000 Issued
Array ( [id] => 7646925 [patent_doc_number] => 06476593 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Method and circuit for compensation control of offset voltages of a radio receiving circuit integrated in a circuit module' [patent_app_type] => B1 [patent_app_number] => 09/680050 [patent_app_country] => US [patent_app_date] => 2000-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3545 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/476/06476593.pdf [firstpage_image] =>[orig_patent_app_number] => 09680050 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/680050
Method and circuit for compensation control of offset voltages of a radio receiving circuit integrated in a circuit module Oct 2, 2000 Issued
Array ( [id] => 1448587 [patent_doc_number] => 06369599 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Circuit and a method for configuring pad connections in an integrated device' [patent_app_type] => B1 [patent_app_number] => 09/663967 [patent_app_country] => US [patent_app_date] => 2000-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3246 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/369/06369599.pdf [firstpage_image] =>[orig_patent_app_number] => 09663967 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/663967
Circuit and a method for configuring pad connections in an integrated device Sep 18, 2000 Issued
Array ( [id] => 1285306 [patent_doc_number] => 06642707 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'High-speed peaking circuit for characteristic impedance control' [patent_app_type] => B1 [patent_app_number] => 09/661073 [patent_app_country] => US [patent_app_date] => 2000-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1854 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642707.pdf [firstpage_image] =>[orig_patent_app_number] => 09661073 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/661073
High-speed peaking circuit for characteristic impedance control Sep 12, 2000 Issued
Array ( [id] => 1536968 [patent_doc_number] => 06489794 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'High speed pass through test system and test method for electronic modules' [patent_app_type] => B1 [patent_app_number] => 09/653148 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3935 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/489/06489794.pdf [firstpage_image] =>[orig_patent_app_number] => 09653148 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/653148
High speed pass through test system and test method for electronic modules Aug 30, 2000 Issued
Array ( [id] => 1456134 [patent_doc_number] => 06462568 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-08 [patent_title] => 'Conductive polymer contact system and test method for semiconductor components' [patent_app_type] => B1 [patent_app_number] => 09/652826 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 22 [patent_no_of_words] => 4397 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/462/06462568.pdf [firstpage_image] =>[orig_patent_app_number] => 09652826 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/652826
Conductive polymer contact system and test method for semiconductor components Aug 30, 2000 Issued
Array ( [id] => 1237579 [patent_doc_number] => 06690184 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-10 [patent_title] => 'Air socket for testing integrated circuits' [patent_app_type] => B1 [patent_app_number] => 09/653111 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5333 [patent_no_of_claims] => 66 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/690/06690184.pdf [firstpage_image] =>[orig_patent_app_number] => 09653111 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/653111
Air socket for testing integrated circuits Aug 30, 2000 Issued
Array ( [id] => 1381919 [patent_doc_number] => 06563299 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer' [patent_app_type] => B1 [patent_app_number] => 09/650798 [patent_app_country] => US [patent_app_date] => 2000-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 12324 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/563/06563299.pdf [firstpage_image] =>[orig_patent_app_number] => 09650798 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/650798
Apparatus for measuring parasitic capacitance and inductance of I/O leads on an electrical component using a network analyzer Aug 29, 2000 Issued
Array ( [id] => 1436916 [patent_doc_number] => 06356095 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => B1 [patent_app_number] => 09/649081 [patent_app_country] => US [patent_app_date] => 2000-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 12872 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/356/06356095.pdf [firstpage_image] =>[orig_patent_app_number] => 09649081 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/649081
Semiconductor integrated circuit Aug 27, 2000 Issued
Array ( [id] => 1315500 [patent_doc_number] => 06614246 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'Probe structure' [patent_app_type] => B1 [patent_app_number] => 09/648452 [patent_app_country] => US [patent_app_date] => 2000-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3638 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/614/06614246.pdf [firstpage_image] =>[orig_patent_app_number] => 09648452 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/648452
Probe structure Aug 27, 2000 Issued
Array ( [id] => 1456156 [patent_doc_number] => 06462575 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-08 [patent_title] => 'Method and system for wafer level testing and burning-in semiconductor components' [patent_app_type] => B1 [patent_app_number] => 09/650342 [patent_app_country] => US [patent_app_date] => 2000-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 28 [patent_no_of_words] => 5390 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/462/06462575.pdf [firstpage_image] =>[orig_patent_app_number] => 09650342 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/650342
Method and system for wafer level testing and burning-in semiconductor components Aug 27, 2000 Issued
Array ( [id] => 1591585 [patent_doc_number] => 06483329 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Test system, test contactor, and test method for electronic modules' [patent_app_type] => B1 [patent_app_number] => 09/650161 [patent_app_country] => US [patent_app_date] => 2000-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 4888 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/483/06483329.pdf [firstpage_image] =>[orig_patent_app_number] => 09650161 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/650161
Test system, test contactor, and test method for electronic modules Aug 27, 2000 Issued
Array ( [id] => 7630868 [patent_doc_number] => 06636064 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'Dual probe test structures for semiconductor integrated circuits' [patent_app_type] => B1 [patent_app_number] => 09/648092 [patent_app_country] => US [patent_app_date] => 2000-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 52 [patent_no_of_words] => 23069 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/636/06636064.pdf [firstpage_image] =>[orig_patent_app_number] => 09648092 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/648092
Dual probe test structures for semiconductor integrated circuits Aug 24, 2000 Issued
Array ( [id] => 1519408 [patent_doc_number] => 06501257 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'High speed multifunction testing and calibration of electronic electricity meters' [patent_app_type] => B1 [patent_app_number] => 09/645847 [patent_app_country] => US [patent_app_date] => 2000-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6309 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/501/06501257.pdf [firstpage_image] =>[orig_patent_app_number] => 09645847 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/645847
High speed multifunction testing and calibration of electronic electricity meters Aug 23, 2000 Issued
Array ( [id] => 1422977 [patent_doc_number] => 06522159 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Short-circuit failure analyzing method and apparatus' [patent_app_type] => B1 [patent_app_number] => 09/644216 [patent_app_country] => US [patent_app_date] => 2000-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8924 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/522/06522159.pdf [firstpage_image] =>[orig_patent_app_number] => 09644216 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/644216
Short-circuit failure analyzing method and apparatus Aug 22, 2000 Issued
Array ( [id] => 1487240 [patent_doc_number] => 06366106 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Probe needle for probe card' [patent_app_type] => B1 [patent_app_number] => 09/642654 [patent_app_country] => US [patent_app_date] => 2000-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2250 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366106.pdf [firstpage_image] =>[orig_patent_app_number] => 09642654 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/642654
Probe needle for probe card Aug 21, 2000 Issued
Array ( [id] => 7623412 [patent_doc_number] => 06686753 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'Prober and apparatus for semiconductor chip analysis' [patent_app_type] => B1 [patent_app_number] => 09/641954 [patent_app_country] => US [patent_app_date] => 2000-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 6671 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686753.pdf [firstpage_image] =>[orig_patent_app_number] => 09641954 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/641954
Prober and apparatus for semiconductor chip analysis Aug 20, 2000 Issued
Array ( [id] => 1548126 [patent_doc_number] => 06445201 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'IC package testing device and method for testing IC package using the same' [patent_app_type] => B1 [patent_app_number] => 09/638891 [patent_app_country] => US [patent_app_date] => 2000-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 13502 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445201.pdf [firstpage_image] =>[orig_patent_app_number] => 09638891 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/638891
IC package testing device and method for testing IC package using the same Aug 15, 2000 Issued
Array ( [id] => 1510058 [patent_doc_number] => 06441636 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Device for testing printed boards' [patent_app_type] => B1 [patent_app_number] => 09/622391 [patent_app_country] => US [patent_app_date] => 2000-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1900 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/441/06441636.pdf [firstpage_image] =>[orig_patent_app_number] => 09622391 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/622391
Device for testing printed boards Aug 13, 2000 Issued
Array ( [id] => 1505973 [patent_doc_number] => 06466045 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Method and apparatus for testing a semiconductor package' [patent_app_type] => B1 [patent_app_number] => 09/636513 [patent_app_country] => US [patent_app_date] => 2000-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3315 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/466/06466045.pdf [firstpage_image] =>[orig_patent_app_number] => 09636513 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/636513
Method and apparatus for testing a semiconductor package Aug 9, 2000 Issued
Menu