Search

George Calvin Atkins Jr.

Examiner (ID: 1357, Phone: (571)270-7809 , Office: P/2412 )

Most Active Art Unit
2412
Art Unit(s)
2412
Total Applications
214
Issued Applications
168
Pending Applications
1
Abandoned Applications
45

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1260577 [patent_doc_number] => 06668332 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-23 [patent_title] => 'Functional clock observation controlled by JTAG extensions' [patent_app_type] => B1 [patent_app_number] => 09/504367 [patent_app_country] => US [patent_app_date] => 2000-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 999 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/668/06668332.pdf [firstpage_image] =>[orig_patent_app_number] => 09504367 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/504367
Functional clock observation controlled by JTAG extensions Feb 14, 2000 Issued
Array ( [id] => 1425034 [patent_doc_number] => 06535937 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Write command verification across a PCI bus system' [patent_app_type] => B1 [patent_app_number] => 09/503911 [patent_app_country] => US [patent_app_date] => 2000-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6368 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535937.pdf [firstpage_image] =>[orig_patent_app_number] => 09503911 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/503911
Write command verification across a PCI bus system Feb 14, 2000 Issued
Array ( [id] => 4399288 [patent_doc_number] => 06304884 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Transparent local and distributed memory management system' [patent_app_type] => 1 [patent_app_number] => 9/504664 [patent_app_country] => US [patent_app_date] => 2000-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6872 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304884.pdf [firstpage_image] =>[orig_patent_app_number] => 504664 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/504664
Transparent local and distributed memory management system Feb 13, 2000 Issued
Array ( [id] => 1444158 [patent_doc_number] => 06496938 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Enhanced PCI clock control architecture' [patent_app_type] => B1 [patent_app_number] => 09/502326 [patent_app_country] => US [patent_app_date] => 2000-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5245 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496938.pdf [firstpage_image] =>[orig_patent_app_number] => 09502326 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/502326
Enhanced PCI clock control architecture Feb 10, 2000 Issued
Array ( [id] => 4426944 [patent_doc_number] => 06195749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Computer system including a memory access controller for using non-system memory storage resources during system boot time' [patent_app_type] => 1 [patent_app_number] => 9/501888 [patent_app_country] => US [patent_app_date] => 2000-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2031 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/195/06195749.pdf [firstpage_image] =>[orig_patent_app_number] => 501888 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/501888
Computer system including a memory access controller for using non-system memory storage resources during system boot time Feb 9, 2000 Issued
Array ( [id] => 1431143 [patent_doc_number] => 06507913 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-14 [patent_title] => 'Protecting smart cards from power analysis with detachable power supplies' [patent_app_type] => B1 [patent_app_number] => 09/475921 [patent_app_country] => US [patent_app_date] => 1999-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2610 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/507/06507913.pdf [firstpage_image] =>[orig_patent_app_number] => 09475921 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/475921
Protecting smart cards from power analysis with detachable power supplies Dec 29, 1999 Issued
Array ( [id] => 1573813 [patent_doc_number] => 06499102 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-24 [patent_title] => 'Method of dynamically changing the lowest sleeping state in ACPI' [patent_app_type] => B1 [patent_app_number] => 09/474219 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7347 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/499/06499102.pdf [firstpage_image] =>[orig_patent_app_number] => 09474219 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474219
Method of dynamically changing the lowest sleeping state in ACPI Dec 28, 1999 Issued
Array ( [id] => 1596016 [patent_doc_number] => 06484267 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Clock gated bus keeper' [patent_app_type] => B1 [patent_app_number] => 09/474413 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3734 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/484/06484267.pdf [firstpage_image] =>[orig_patent_app_number] => 09474413 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474413
Clock gated bus keeper Dec 28, 1999 Issued
Array ( [id] => 1412033 [patent_doc_number] => 06553491 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-22 [patent_title] => 'Configuring devices in a computer system' [patent_app_type] => B1 [patent_app_number] => 09/474647 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1392 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/553/06553491.pdf [firstpage_image] =>[orig_patent_app_number] => 09474647 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474647
Configuring devices in a computer system Dec 28, 1999 Issued
Array ( [id] => 1327040 [patent_doc_number] => 06609209 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Method and apparatus for reducing the power consumed by a processor by gating the clock signal to pipeline stages' [patent_app_type] => B1 [patent_app_number] => 09/474461 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3835 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/609/06609209.pdf [firstpage_image] =>[orig_patent_app_number] => 09474461 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474461
Method and apparatus for reducing the power consumed by a processor by gating the clock signal to pipeline stages Dec 28, 1999 Issued
Array ( [id] => 1431151 [patent_doc_number] => 06507915 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-14 [patent_title] => 'Clock and data signal separator circuit' [patent_app_type] => B1 [patent_app_number] => 09/474530 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3337 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/507/06507915.pdf [firstpage_image] =>[orig_patent_app_number] => 09474530 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474530
Clock and data signal separator circuit Dec 28, 1999 Issued
Array ( [id] => 1423048 [patent_doc_number] => 06535780 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'High speed programmer system' [patent_app_type] => B1 [patent_app_number] => 09/471675 [patent_app_country] => US [patent_app_date] => 1999-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6003 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535780.pdf [firstpage_image] =>[orig_patent_app_number] => 09471675 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/471675
High speed programmer system Dec 23, 1999 Issued
Array ( [id] => 1430033 [patent_doc_number] => 06510526 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Differential clocking for digital platforms' [patent_app_type] => B1 [patent_app_number] => 09/471307 [patent_app_country] => US [patent_app_date] => 1999-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3155 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510526.pdf [firstpage_image] =>[orig_patent_app_number] => 09471307 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/471307
Differential clocking for digital platforms Dec 22, 1999 Issued
Array ( [id] => 1339493 [patent_doc_number] => 06601166 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'Mechanism for booting a computer through a network' [patent_app_type] => B1 [patent_app_number] => 09/471792 [patent_app_country] => US [patent_app_date] => 1999-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3324 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/601/06601166.pdf [firstpage_image] =>[orig_patent_app_number] => 09471792 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/471792
Mechanism for booting a computer through a network Dec 22, 1999 Issued
Array ( [id] => 1521624 [patent_doc_number] => 06502141 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'Method and system for approximate, monotonic time synchronization for a multiple node NUMA system' [patent_app_type] => B1 [patent_app_number] => 09/461679 [patent_app_country] => US [patent_app_date] => 1999-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3666 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/502/06502141.pdf [firstpage_image] =>[orig_patent_app_number] => 09461679 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/461679
Method and system for approximate, monotonic time synchronization for a multiple node NUMA system Dec 13, 1999 Issued
Array ( [id] => 1197035 [patent_doc_number] => 06732264 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Multi-tasking boot firmware' [patent_app_type] => B1 [patent_app_number] => 09/461161 [patent_app_country] => US [patent_app_date] => 1999-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3186 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732264.pdf [firstpage_image] =>[orig_patent_app_number] => 09461161 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/461161
Multi-tasking boot firmware Dec 13, 1999 Issued
Array ( [id] => 7629977 [patent_doc_number] => 06636962 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-21 [patent_title] => 'Self-initializing chipset' [patent_app_type] => B1 [patent_app_number] => 09/459743 [patent_app_country] => US [patent_app_date] => 1999-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 1680 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/636/06636962.pdf [firstpage_image] =>[orig_patent_app_number] => 09459743 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/459743
Self-initializing chipset Dec 9, 1999 Issued
Array ( [id] => 1506017 [patent_doc_number] => 06487656 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-26 [patent_title] => 'System and method for providing functionalities to system BIOS' [patent_app_type] => B1 [patent_app_number] => 09/459060 [patent_app_country] => US [patent_app_date] => 1999-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6757 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487656.pdf [firstpage_image] =>[orig_patent_app_number] => 09459060 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/459060
System and method for providing functionalities to system BIOS Dec 9, 1999 Issued
Array ( [id] => 1430560 [patent_doc_number] => 06526517 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Staggered computer component startup' [patent_app_type] => B1 [patent_app_number] => 09/459228 [patent_app_country] => US [patent_app_date] => 1999-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3575 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/526/06526517.pdf [firstpage_image] =>[orig_patent_app_number] => 09459228 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/459228
Staggered computer component startup Dec 9, 1999 Issued
Array ( [id] => 1429140 [patent_doc_number] => 06513114 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-28 [patent_title] => 'System and methods for providing selectable initialization sequences' [patent_app_type] => B1 [patent_app_number] => 09/457016 [patent_app_country] => US [patent_app_date] => 1999-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3833 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/513/06513114.pdf [firstpage_image] =>[orig_patent_app_number] => 09457016 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/457016
System and methods for providing selectable initialization sequences Dec 7, 1999 Issued
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