George Chan Pui Yeung
Examiner (ID: 10920)
Most Active Art Unit | 1302 |
Art Unit(s) | 1761, 2899, 1722, 1303, 2107, 1772, 1302 |
Total Applications | 1982 |
Issued Applications | 1711 |
Pending Applications | 98 |
Abandoned Applications | 173 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 2889557
[patent_doc_number] => 05210048
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-05-11
[patent_title] => 'Nonvolatile semiconductor memory device with offset transistor and method for manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 7/924521
[patent_app_country] => US
[patent_app_date] => 1992-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 40
[patent_no_of_words] => 7887
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 345
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/210/05210048.pdf
[firstpage_image] =>[orig_patent_app_number] => 924521
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/924521 | Nonvolatile semiconductor memory device with offset transistor and method for manufacturing the same | Aug 3, 1992 | Issued |
Array
(
[id] => 2918352
[patent_doc_number] => 05234856
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-10
[patent_title] => 'Dynamic random access memory cell having a stacked-trench capacitor that is resistant to alpha particle generated soft errors, and method of manufacturing same'
[patent_app_type] => 1
[patent_app_number] => 7/869683
[patent_app_country] => US
[patent_app_date] => 1992-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 2875
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 325
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/234/05234856.pdf
[firstpage_image] =>[orig_patent_app_number] => 869683
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/869683 | Dynamic random access memory cell having a stacked-trench capacitor that is resistant to alpha particle generated soft errors, and method of manufacturing same | Apr 14, 1992 | Issued |
Array
(
[id] => 2982351
[patent_doc_number] => 05250459
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-05
[patent_title] => 'Electrically programmable low resistive antifuse element'
[patent_app_type] => 1
[patent_app_number] => 7/869355
[patent_app_country] => US
[patent_app_date] => 1992-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 1461
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/250/05250459.pdf
[firstpage_image] =>[orig_patent_app_number] => 869355
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/869355 | Electrically programmable low resistive antifuse element | Apr 13, 1992 | Issued |
Array
(
[id] => 2909419
[patent_doc_number] => 05227322
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-13
[patent_title] => 'Method for manufacturing a highly integrated semiconductor device having a capacitor of large capacitance'
[patent_app_type] => 1
[patent_app_number] => 7/868725
[patent_app_country] => US
[patent_app_date] => 1992-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 25
[patent_no_of_words] => 5020
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/227/05227322.pdf
[firstpage_image] =>[orig_patent_app_number] => 868725
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/868725 | Method for manufacturing a highly integrated semiconductor device having a capacitor of large capacitance | Apr 13, 1992 | Issued |
Array
(
[id] => 2932853
[patent_doc_number] => 05229312
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-20
[patent_title] => 'Nonvolatile trench memory device and self-aligned method for making such a device'
[patent_app_type] => 1
[patent_app_number] => 7/867595
[patent_app_country] => US
[patent_app_date] => 1992-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 2288
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 439
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/229/05229312.pdf
[firstpage_image] =>[orig_patent_app_number] => 867595
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/867595 | Nonvolatile trench memory device and self-aligned method for making such a device | Apr 12, 1992 | Issued |
Array
(
[id] => 2929290
[patent_doc_number] => 05232860
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-03
[patent_title] => 'Method of flexible photovoltaic device manufacture'
[patent_app_type] => 1
[patent_app_number] => 7/851785
[patent_app_country] => US
[patent_app_date] => 1992-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1530
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/232/05232860.pdf
[firstpage_image] =>[orig_patent_app_number] => 851785
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/851785 | Method of flexible photovoltaic device manufacture | Mar 15, 1992 | Issued |
Array
(
[id] => 2909915
[patent_doc_number] => 05236853
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-17
[patent_title] => 'Self-aligned double density polysilicon lines for ROM and EPROM'
[patent_app_type] => 1
[patent_app_number] => 7/838843
[patent_app_country] => US
[patent_app_date] => 1992-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 2407
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 249
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/236/05236853.pdf
[firstpage_image] =>[orig_patent_app_number] => 838843
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/838843 | Self-aligned double density polysilicon lines for ROM and EPROM | Feb 20, 1992 | Issued |
Array
(
[id] => 2916564
[patent_doc_number] => 05206183
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-27
[patent_title] => 'Method of forming a bit line over capacitor array of memory cells'
[patent_app_type] => 1
[patent_app_number] => 7/838537
[patent_app_country] => US
[patent_app_date] => 1992-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 3820
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 357
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/206/05206183.pdf
[firstpage_image] =>[orig_patent_app_number] => 838537
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/838537 | Method of forming a bit line over capacitor array of memory cells | Feb 18, 1992 | Issued |
Array
(
[id] => 2933177
[patent_doc_number] => 05229331
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-20
[patent_title] => 'Method to form self-aligned gate structures around cold cathode emitter tips using chemical mechanical polishing technology'
[patent_app_type] => 1
[patent_app_number] => 7/837453
[patent_app_country] => US
[patent_app_date] => 1992-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3289
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/229/05229331.pdf
[firstpage_image] =>[orig_patent_app_number] => 837453
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/837453 | Method to form self-aligned gate structures around cold cathode emitter tips using chemical mechanical polishing technology | Feb 13, 1992 | Issued |
Array
(
[id] => 2974135
[patent_doc_number] => 05208177
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-05-04
[patent_title] => 'Local field enhancement for better programmability of antifuse PROM'
[patent_app_type] => 1
[patent_app_number] => 7/832561
[patent_app_country] => US
[patent_app_date] => 1992-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 1481
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/208/05208177.pdf
[firstpage_image] =>[orig_patent_app_number] => 832561
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/832561 | Local field enhancement for better programmability of antifuse PROM | Feb 6, 1992 | Issued |
Array
(
[id] => 2982459
[patent_doc_number] => 05250465
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-10-05
[patent_title] => 'Method of manufacturing semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 7/825255
[patent_app_country] => US
[patent_app_date] => 1992-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 20
[patent_no_of_words] => 5497
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/250/05250465.pdf
[firstpage_image] =>[orig_patent_app_number] => 825255
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/825255 | Method of manufacturing semiconductor devices | Jan 23, 1992 | Issued |
Array
(
[id] => 2887314
[patent_doc_number] => 05238860
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-24
[patent_title] => 'Semiconductor device having different impurity concentration wells'
[patent_app_type] => 1
[patent_app_number] => 7/816565
[patent_app_country] => US
[patent_app_date] => 1992-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 34
[patent_no_of_words] => 4611
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/238/05238860.pdf
[firstpage_image] =>[orig_patent_app_number] => 816565
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/816565 | Semiconductor device having different impurity concentration wells | Jan 2, 1992 | Issued |
Array
(
[id] => 2920982
[patent_doc_number] => 05192702
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-09
[patent_title] => 'Self-aligned cylindrical stacked capacitor DRAM cell'
[patent_app_type] => 1
[patent_app_number] => 7/811991
[patent_app_country] => US
[patent_app_date] => 1991-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 33
[patent_no_of_words] => 5258
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 295
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/192/05192702.pdf
[firstpage_image] =>[orig_patent_app_number] => 811991
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/811991 | Self-aligned cylindrical stacked capacitor DRAM cell | Dec 22, 1991 | Issued |
Array
(
[id] => 2931402
[patent_doc_number] => 05188977
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-02-23
[patent_title] => 'Method for manufacturing an electrically conductive tip composed of a doped semiconductor material'
[patent_app_type] => 1
[patent_app_number] => 7/802811
[patent_app_country] => US
[patent_app_date] => 1991-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 8
[patent_no_of_words] => 2206
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/188/05188977.pdf
[firstpage_image] =>[orig_patent_app_number] => 802811
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/802811 | Method for manufacturing an electrically conductive tip composed of a doped semiconductor material | Dec 5, 1991 | Issued |
Array
(
[id] => 2904981
[patent_doc_number] => 05215929
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-01
[patent_title] => 'Method of manufacturing pn-junction device II-VI compound semiconductor'
[patent_app_type] => 1
[patent_app_number] => 7/800415
[patent_app_country] => US
[patent_app_date] => 1991-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 13
[patent_no_of_words] => 3605
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 287
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/215/05215929.pdf
[firstpage_image] =>[orig_patent_app_number] => 800415
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/800415 | Method of manufacturing pn-junction device II-VI compound semiconductor | Nov 28, 1991 | Issued |
07/798895 | METHOD OF FABRICATING MEMORY CELL FOR SEMICONDUCTOR INTEGRATED CIRCUIT | Nov 26, 1991 | Abandoned |
Array
(
[id] => 2930171
[patent_doc_number] => 05219778
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-15
[patent_title] => 'Stacked V-cell capacitor'
[patent_app_type] => 1
[patent_app_number] => 7/800803
[patent_app_country] => US
[patent_app_date] => 1991-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 2371
[patent_no_of_claims] => 19
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[patent_words_short_claim] => 430
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/219/05219778.pdf
[firstpage_image] =>[orig_patent_app_number] => 800803
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/800803 | Stacked V-cell capacitor | Nov 26, 1991 | Issued |
Array
(
[id] => 2910009
[patent_doc_number] => 05236858
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-17
[patent_title] => 'Method of manufacturing a semiconductor device with vertically stacked structure'
[patent_app_type] => 1
[patent_app_number] => 7/796845
[patent_app_country] => US
[patent_app_date] => 1991-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 3439
[patent_no_of_claims] => 6
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/236/05236858.pdf
[firstpage_image] =>[orig_patent_app_number] => 796845
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/796845 | Method of manufacturing a semiconductor device with vertically stacked structure | Nov 24, 1991 | Issued |
Array
(
[id] => 2874927
[patent_doc_number] => 05158898
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-27
[patent_title] => 'Self-aligned under-gated thin film transistor and method of formation'
[patent_app_type] => 1
[patent_app_number] => 7/794279
[patent_app_country] => US
[patent_app_date] => 1991-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/158/05158898.pdf
[firstpage_image] =>[orig_patent_app_number] => 794279
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/794279 | Self-aligned under-gated thin film transistor and method of formation | Nov 18, 1991 | Issued |
Array
(
[id] => 2828686
[patent_doc_number] => 05128282
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-07-07
[patent_title] => 'Process for separating image sensor dies and the like from a wafer that minimizes silicon waste'
[patent_app_type] => 1
[patent_app_number] => 7/787445
[patent_app_country] => US
[patent_app_date] => 1991-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3935
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/128/05128282.pdf
[firstpage_image] =>[orig_patent_app_number] => 787445
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/787445 | Process for separating image sensor dies and the like from a wafer that minimizes silicon waste | Nov 3, 1991 | Issued |