Search

George D Kirschbaum

Examiner (ID: 9114, Phone: (571)272-4232 , Office: P/2913 )

Most Active Art Unit
2913
Art Unit(s)
2922, 2913
Total Applications
3474
Issued Applications
3317
Pending Applications
8
Abandoned Applications
148

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17715391 [patent_doc_number] => 11379382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Cache management using favored volumes and a multiple tiered cache memory [patent_app_type] => utility [patent_app_number] => 17/114955 [patent_app_country] => US [patent_app_date] => 2020-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7421 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17114955 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/114955
Cache management using favored volumes and a multiple tiered cache memory Dec 7, 2020 Issued
Array ( [id] => 17659335 [patent_doc_number] => 20220179800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => Conditional Direct Memory Access Channel Activation [patent_app_type] => utility [patent_app_number] => 17/114933 [patent_app_country] => US [patent_app_date] => 2020-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5577 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17114933 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/114933
Conditional direct memory access channel activation Dec 7, 2020 Issued
Array ( [id] => 18030779 [patent_doc_number] => 11513968 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-11-29 [patent_title] => Systems and methods for coupled cache management [patent_app_type] => utility [patent_app_number] => 17/111418 [patent_app_country] => US [patent_app_date] => 2020-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10379 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17111418 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/111418
Systems and methods for coupled cache management Dec 2, 2020 Issued
Array ( [id] => 17499491 [patent_doc_number] => 11288197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Method and apparatus for performing pipeline-based accessing management in a storage server [patent_app_type] => utility [patent_app_number] => 17/106158 [patent_app_country] => US [patent_app_date] => 2020-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14475 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17106158 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/106158
Method and apparatus for performing pipeline-based accessing management in a storage server Nov 28, 2020 Issued
Array ( [id] => 17261078 [patent_doc_number] => 20210374063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => METHOD FOR PROCESSING PAGE FAULT BY PROCESSOR [patent_app_type] => utility [patent_app_number] => 16/950370 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16950370 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/950370
Method for processing page fault by processor Nov 16, 2020 Issued
Array ( [id] => 18154896 [patent_doc_number] => 11567876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Resolving cache slot locking conflicts for remote replication [patent_app_type] => utility [patent_app_number] => 17/084835 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 15094 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17084835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/084835
Resolving cache slot locking conflicts for remote replication Oct 29, 2020 Issued
Array ( [id] => 19243355 [patent_doc_number] => 12013794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Confidential computing mechanism [patent_app_type] => utility [patent_app_number] => 17/774585 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 18576 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17774585 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/774585
Confidential computing mechanism Oct 27, 2020 Issued
Array ( [id] => 17550134 [patent_doc_number] => 20220121476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => REGISTERING A CUSTOM ATOMIC OPERATION WITH THE OPERATING SYSTEM [patent_app_type] => utility [patent_app_number] => 17/074823 [patent_app_country] => US [patent_app_date] => 2020-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074823 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/074823
Registering a custom atomic operation with the operating system Oct 19, 2020 Issued
Array ( [id] => 17521991 [patent_doc_number] => 20220107840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => COMPUTATION AND STORAGE OF OBJECT IDENTITY HASH VALUES [patent_app_type] => utility [patent_app_number] => 17/065354 [patent_app_country] => US [patent_app_date] => 2020-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17065354 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/065354
Computation and storage of object identity hash values Oct 6, 2020 Issued
Array ( [id] => 17892282 [patent_doc_number] => 11455253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Set indexing for first-level and second-level set-associative cache [patent_app_type] => utility [patent_app_number] => 17/060624 [patent_app_country] => US [patent_app_date] => 2020-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 11013 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17060624 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/060624
Set indexing for first-level and second-level set-associative cache Sep 30, 2020 Issued
Array ( [id] => 16714185 [patent_doc_number] => 20210081332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => CACHE SET PERMUTATIONS BASED ON GALOIS FIELD OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/032883 [patent_app_country] => US [patent_app_date] => 2020-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11025 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17032883 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/032883
Cache set permutations based on Galois Field operations Sep 24, 2020 Issued
Array ( [id] => 16577234 [patent_doc_number] => 20210011635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => DETECTION OF ALTERATION OF STORAGE KEYS USED TO PROTECT MEMORY [patent_app_type] => utility [patent_app_number] => 17/032144 [patent_app_country] => US [patent_app_date] => 2020-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16674 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17032144 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/032144
Detection of alteration of storage keys used to protect memory Sep 24, 2020 Issued
Array ( [id] => 16543193 [patent_doc_number] => 20200409608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => MEMORY CONTROLLER MANAGING TEMPERATURE OF MEMORY DEVICE AND MEMORY SYSTEM HAVING THE MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 17/019570 [patent_app_country] => US [patent_app_date] => 2020-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8610 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17019570 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/019570
Memory controller managing temperature of memory device and memory system having the memory controller Sep 13, 2020 Issued
Array ( [id] => 17462415 [patent_doc_number] => 20220075720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => TRI-COLOR BITMAP ARRAY FOR GARBAGE COLLECTION [patent_app_type] => utility [patent_app_number] => 17/015324 [patent_app_country] => US [patent_app_date] => 2020-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17015324 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/015324
Tri-color bitmap array for garbage collection Sep 8, 2020 Issued
Array ( [id] => 18855651 [patent_doc_number] => 11853229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Method and apparatus for updating cached information, device, and medium [patent_app_type] => utility [patent_app_number] => 17/637758 [patent_app_country] => US [patent_app_date] => 2020-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6433 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17637758 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/637758
Method and apparatus for updating cached information, device, and medium Aug 25, 2020 Issued
Array ( [id] => 16659330 [patent_doc_number] => 20210055967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => METHOD AND APPARATUS FOR MEMORY ALLOCATION IN A MULTI-CORE PROCESSOR SYSTEM, AND RECORDING MEDIUM THEREFOR [patent_app_type] => utility [patent_app_number] => 16/997160 [patent_app_country] => US [patent_app_date] => 2020-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997160 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/997160
Method and apparatus for memory allocation in a multi-core processor system, and recording medium therefor Aug 18, 2020 Issued
Array ( [id] => 17415871 [patent_doc_number] => 20220050775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => DISASSOCIATING MEMORY UNITS WITH A HOST SYSTEM [patent_app_type] => utility [patent_app_number] => 16/995668 [patent_app_country] => US [patent_app_date] => 2020-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16995668 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/995668
Disassociating memory units with a host system Aug 16, 2020 Issued
Array ( [id] => 16470182 [patent_doc_number] => 20200371719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => VIRTUAL PARTITION MANAGEMENT IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/990864 [patent_app_country] => US [patent_app_date] => 2020-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12602 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16990864 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/990864
Virtual partition management in a memory device Aug 10, 2020 Issued
Array ( [id] => 19182541 [patent_doc_number] => 11989129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Multiple virtual NUMA domains within a single NUMA domain via operating system interface tables [patent_app_type] => utility [patent_app_number] => 16/986490 [patent_app_country] => US [patent_app_date] => 2020-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5631 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16986490 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/986490
Multiple virtual NUMA domains within a single NUMA domain via operating system interface tables Aug 5, 2020 Issued
Array ( [id] => 16423549 [patent_doc_number] => 20200348747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => STATIC POWER REDUCTION IN CACHES USING DETERMINISTIC NAPS [patent_app_type] => utility [patent_app_number] => 16/933407 [patent_app_country] => US [patent_app_date] => 2020-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16933407 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/933407
Static power reduction in caches using deterministic naps Jul 19, 2020 Issued
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