| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2826343
[patent_doc_number] => 05123097
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-16
[patent_title] => 'Apparatus and method for simultaneous execution of a write instruction and a succeeding read instruction in a data processing system with a store through cache strategy'
[patent_app_type] => 1
[patent_app_number] => 7/294529
[patent_app_country] => US
[patent_app_date] => 1989-01-05
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[pdf_file] => patents/05/123/05123097.pdf
[firstpage_image] =>[orig_patent_app_number] => 294529
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/294529 | Apparatus and method for simultaneous execution of a write instruction and a succeeding read instruction in a data processing system with a store through cache strategy | Jan 4, 1989 | Issued |
Array
(
[id] => 2831448
[patent_doc_number] => 05095428
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-10
[patent_title] => 'Cache flush request circuit flushes the cache if input/output space write operation and circuit board response are occurring concurrently'
[patent_app_type] => 1
[patent_app_number] => 7/293221
[patent_app_country] => US
[patent_app_date] => 1989-01-04
[patent_effective_date] => 0000-00-00
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/095/05095428.pdf
[firstpage_image] =>[orig_patent_app_number] => 293221
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/293221 | Cache flush request circuit flushes the cache if input/output space write operation and circuit board response are occurring concurrently | Jan 3, 1989 | Issued |
Array
(
[id] => 2820449
[patent_doc_number] => 05086426
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-02-04
[patent_title] => 'Communication network system having a plurality of different protocal LAN\'s'
[patent_app_type] => 1
[patent_app_number] => 7/286847
[patent_app_country] => US
[patent_app_date] => 1988-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 19
[patent_no_of_words] => 4993
[patent_no_of_claims] => 13
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[patent_words_short_claim] => 194
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/086/05086426.pdf
[firstpage_image] =>[orig_patent_app_number] => 286847
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/286847 | Communication network system having a plurality of different protocal LAN's | Dec 19, 1988 | Issued |
Array
(
[id] => 2788478
[patent_doc_number] => 05133075
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-07-21
[patent_title] => 'Method of monitoring changes in attribute values of object in an object-oriented database'
[patent_app_type] => 1
[patent_app_number] => 7/286556
[patent_app_country] => US
[patent_app_date] => 1988-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 5865
[patent_no_of_claims] => 21
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[pdf_file] => patents/05/133/05133075.pdf
[firstpage_image] =>[orig_patent_app_number] => 286556
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/286556 | Method of monitoring changes in attribute values of object in an object-oriented database | Dec 18, 1988 | Issued |
| 07/286194 | SYNCHRONOUS-TO-SYNCHRONOUS PARALLEL WORD TRANSFER CIRCCUIT | Dec 18, 1988 | Abandoned |
Array
(
[id] => 2733725
[patent_doc_number] => 05058003
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-15
[patent_title] => 'Virtual storage dynamic address translation mechanism for multiple-sized pages'
[patent_app_type] => 1
[patent_app_number] => 7/285176
[patent_app_country] => US
[patent_app_date] => 1988-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => patents/05/058/05058003.pdf
[firstpage_image] =>[orig_patent_app_number] => 285176
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/285176 | Virtual storage dynamic address translation mechanism for multiple-sized pages | Dec 14, 1988 | Issued |
| 07/282793 | INTGRATED CIRCUIT WITH WATCHDOG TIMER AND SLEEP CONTROL LOGIC WHICH PLACES IC AND WATCHDOG TTIMER INTO SLEEP MODE | Dec 8, 1988 | Abandoned |
Array
(
[id] => 2742794
[patent_doc_number] => 05077654
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-31
[patent_title] => 'Virtual machine system which translates virtual address from a selected virtual machine into real address of main storage'
[patent_app_type] => 1
[patent_app_number] => 7/281334
[patent_app_country] => US
[patent_app_date] => 1988-12-08
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[pdf_file] => patents/05/077/05077654.pdf
[firstpage_image] =>[orig_patent_app_number] => 281334
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/281334 | Virtual machine system which translates virtual address from a selected virtual machine into real address of main storage | Dec 7, 1988 | Issued |
Array
(
[id] => 2831305
[patent_doc_number] => 05095420
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-10
[patent_title] => 'Method and system for performing virtual address range mapping in a virtual storage data processing system'
[patent_app_type] => 1
[patent_app_number] => 7/274062
[patent_app_country] => US
[patent_app_date] => 1988-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 5744
[patent_no_of_claims] => 14
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/095/05095420.pdf
[firstpage_image] =>[orig_patent_app_number] => 274062
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/274062 | Method and system for performing virtual address range mapping in a virtual storage data processing system | Nov 20, 1988 | Issued |
| 07/259345 | A METHOD AND APPARTUS FOR EXECUTING A CONDITION CODE DEPENDENT INSTRUCTION | Oct 17, 1988 | Abandoned |
Array
(
[id] => 2861029
[patent_doc_number] => 05089952
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-02-18
[patent_title] => 'Method for allowing weak searchers to access pointer-connected data structures without locking'
[patent_app_type] => 1
[patent_app_number] => 7/255000
[patent_app_country] => US
[patent_app_date] => 1988-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 5746
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/089/05089952.pdf
[firstpage_image] =>[orig_patent_app_number] => 255000
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/255000 | Method for allowing weak searchers to access pointer-connected data structures without locking | Oct 6, 1988 | Issued |
Array
(
[id] => 2826505
[patent_doc_number] => 05123106
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-16
[patent_title] => 'Multiprocessor system with shared memory includes primary processor which selectively accesses primary local memory and common memories without using arbiter'
[patent_app_type] => 1
[patent_app_number] => 7/248088
[patent_app_country] => US
[patent_app_date] => 1988-09-23
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[pdf_file] => patents/05/123/05123106.pdf
[firstpage_image] =>[orig_patent_app_number] => 248088
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/248088 | Multiprocessor system with shared memory includes primary processor which selectively accesses primary local memory and common memories without using arbiter | Sep 22, 1988 | Issued |
Array
(
[id] => 2715723
[patent_doc_number] => 05068824
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-11-26
[patent_title] => 'Method of setting the operating parameters in a microprocessor-controlled typewriter or other microprocessor-controlled office machine'
[patent_app_type] => 1
[patent_app_number] => 7/239497
[patent_app_country] => US
[patent_app_date] => 1988-09-01
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[pdf_file] => patents/05/068/05068824.pdf
[firstpage_image] =>[orig_patent_app_number] => 239497
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/239497 | Method of setting the operating parameters in a microprocessor-controlled typewriter or other microprocessor-controlled office machine | Aug 31, 1988 | Issued |
Array
(
[id] => 2790596
[patent_doc_number] => 05088058
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-02-11
[patent_title] => 'Apparatus and method for evaluating and predicting computer I/O performance using I/O workload snapshots for model input'
[patent_app_type] => 1
[patent_app_number] => 7/237120
[patent_app_country] => US
[patent_app_date] => 1988-08-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/088/05088058.pdf
[firstpage_image] =>[orig_patent_app_number] => 237120
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/237120 | Apparatus and method for evaluating and predicting computer I/O performance using I/O workload snapshots for model input | Aug 25, 1988 | Issued |
Array
(
[id] => 2779728
[patent_doc_number] => 05075675
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-12-24
[patent_title] => 'Method and apparatus for dynamic promotion of background window displays in multi-tasking computer systems'
[patent_app_type] => 1
[patent_app_number] => 7/213423
[patent_app_country] => US
[patent_app_date] => 1988-06-30
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[pdf_file] => patents/05/075/05075675.pdf
[firstpage_image] =>[orig_patent_app_number] => 213423
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/213423 | Method and apparatus for dynamic promotion of background window displays in multi-tasking computer systems | Jun 29, 1988 | Issued |
Array
(
[id] => 2796515
[patent_doc_number] => 05093916
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-03
[patent_title] => 'System for inserting constructs into compiled code, defining scoping of common blocks and dynamically binding common blocks to tasks'
[patent_app_type] => 1
[patent_app_number] => 7/197060
[patent_app_country] => US
[patent_app_date] => 1988-05-20
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[pdf_file] => patents/05/093/05093916.pdf
[firstpage_image] =>[orig_patent_app_number] => 197060
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/197060 | System for inserting constructs into compiled code, defining scoping of common blocks and dynamically binding common blocks to tasks | May 19, 1988 | Issued |
Array
(
[id] => 2835792
[patent_doc_number] => 05170470
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-08
[patent_title] => 'Integrated modem which employs a host processor as its controller'
[patent_app_type] => 1
[patent_app_number] => 7/189062
[patent_app_country] => US
[patent_app_date] => 1988-05-02
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[pdf_file] => patents/05/170/05170470.pdf
[firstpage_image] =>[orig_patent_app_number] => 189062
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/189062 | Integrated modem which employs a host processor as its controller | May 1, 1988 | Issued |
Array
(
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[patent_doc_number] => 05113523
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-12
[patent_title] => 'High performance computer system'
[patent_app_type] => 1
[patent_app_number] => 6/731170
[patent_app_country] => US
[patent_app_date] => 1985-05-06
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/113/05113523.pdf
[firstpage_image] =>[orig_patent_app_number] => 731170
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/731170 | High performance computer system | May 5, 1985 | Issued |