Gerald Mcclain

Array ( [id] => 4522210 [patent_doc_number] => 07911846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Apparatus for reducing the impact of program disturb' [patent_app_type] => utility [patent_app_number] => 12/725446 [patent_app_country] => US [patent_app_date] => 2010-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 14380 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/911/07911846.pdf [firstpage_image] =>[orig_patent_app_number] => 12725446 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8258833 [patent_doc_number] => 08208338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-26 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/719979 [patent_app_country] => US [patent_app_date] => 2010-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 8476 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12719979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6267322 [patent_doc_number] => 20100254190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'NONVOLATILE MEMORY DEVICE HAVING DIFFERENT TYPES OF METAL LINES' [patent_app_type] => utility [patent_app_number] => 12/718067 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8157 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20100254190.pdf [firstpage_image] =>[orig_patent_app_number] => 12718067 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8245953 [patent_doc_number] => 08203882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Non-volatile semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 12/718353 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11707 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 776 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/203/08203882.pdf [firstpage_image] =>[orig_patent_app_number] => 12718353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6286160 [patent_doc_number] => 20100157665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'MEMORY CELL DEVICE AND PROGRAMMING METHODS' [patent_app_type] => utility [patent_app_number] => 12/715686 [patent_app_country] => US [patent_app_date] => 2010-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4912 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20100157665.pdf [firstpage_image] =>[orig_patent_app_number] => 12715686 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8341608 [patent_doc_number] => 08243546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Systems and methods for peak power and/or EMI reduction' [patent_app_type] => utility [patent_app_number] => 12/716265 [patent_app_country] => US [patent_app_date] => 2010-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12716265 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5934691 [patent_doc_number] => 20110211404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'Recalibration Systems and Techniques for Electronic Memory Applications' [patent_app_type] => utility [patent_app_number] => 12/714767 [patent_app_country] => US [patent_app_date] => 2010-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4018 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20110211404.pdf [firstpage_image] =>[orig_patent_app_number] => 12714767 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6520114 [patent_doc_number] => 20100220509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'Selective Activation of Programming Schemes in Analog Memory Cell Arrays' [patent_app_type] => utility [patent_app_number] => 12/714501 [patent_app_country] => US [patent_app_date] => 2010-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6804 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20100220509.pdf [firstpage_image] =>[orig_patent_app_number] => 12714501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8423180 [patent_doc_number] => 08279671 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Flash memory devices, methods for programming the same, and memory systems including the same' [patent_app_type] => utility [patent_app_number] => 12/711383 [patent_app_country] => US [patent_app_date] => 2010-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 15909 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12711383 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6044856 [patent_doc_number] => 20110205823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'Non-Volatile Storage With Temperature Compensation Based On Neighbor State Information' [patent_app_type] => utility [patent_app_number] => 12/708699 [patent_app_country] => US [patent_app_date] => 2010-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 17103 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20110205823.pdf [firstpage_image] =>[orig_patent_app_number] => 12708699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6464586 [patent_doc_number] => 20100146329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-10 [patent_title] => 'CELL DETERIORATION WARNING APPARATUS AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/706409 [patent_app_country] => US [patent_app_date] => 2010-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7797 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20100146329.pdf [firstpage_image] =>[orig_patent_app_number] => 12706409 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6484047 [patent_doc_number] => 20100208534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, MEMORY MODULE INCLUDING THE SAME, AND DATA PROCESSING SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/706273 [patent_app_country] => US [patent_app_date] => 2010-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7208 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20100208534.pdf [firstpage_image] =>[orig_patent_app_number] => 12706273 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6463311 [patent_doc_number] => 20100146199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-10 [patent_title] => 'Memory System Topologies Including A Buffer Device And An Integrated Circuit Memory Device' [patent_app_type] => utility [patent_app_number] => 12/703521 [patent_app_country] => US [patent_app_date] => 2010-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 28151 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20100146199.pdf [firstpage_image] =>[orig_patent_app_number] => 12703521 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8117341 [patent_doc_number] => 08159892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Nonvolatile memory device and method of testing the same' [patent_app_type] => utility [patent_app_number] => 12/702597 [patent_app_country] => US [patent_app_date] => 2010-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3585 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/159/08159892.pdf [firstpage_image] =>[orig_patent_app_number] => 12702597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8195324 [patent_doc_number] => 20120120714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'MEMORY RESISTOR HAVING MULTI-LAYER ELECTRODES' [patent_app_type] => utility [patent_app_number] => 13/387063 [patent_app_country] => US [patent_app_date] => 2010-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3326 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20120120714.pdf [firstpage_image] =>[orig_patent_app_number] => 13387063 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6163442 [patent_doc_number] => 20110194341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'SPIN-TORQUE BASED MEMORY DEVICE WITH READ AND WRITE CURRENT PATHS MODULATED WITH A NON-LINEAR SHUNT RESISTOR' [patent_app_type] => utility [patent_app_number] => 12/701867 [patent_app_country] => US [patent_app_date] => 2010-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6936 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20110194341.pdf [firstpage_image] =>[orig_patent_app_number] => 12701867 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8258836 [patent_doc_number] => 08208334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-26 [patent_title] => 'Systems, memories, and methods for refreshing memory arrays' [patent_app_type] => utility [patent_app_number] => 12/702037 [patent_app_country] => US [patent_app_date] => 2010-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 12682 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12702037 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6508408 [patent_doc_number] => 20100202215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'Methods for Programming Nonvolatile Memory Devices' [patent_app_type] => utility [patent_app_number] => 12/701037 [patent_app_country] => US [patent_app_date] => 2010-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 16499 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20100202215.pdf [firstpage_image] =>[orig_patent_app_number] => 12701037 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8365115 [patent_doc_number] => 08254185 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-28 [patent_title] => 'Semiconductor device for generating internal voltage and memory system including the semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/700383 [patent_app_country] => US [patent_app_date] => 2010-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6392 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12700383 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6253188 [patent_doc_number] => 20100138681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-03 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/699083 [patent_app_country] => US [patent_app_date] => 2010-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10036 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20100138681.pdf [firstpage_image] =>[orig_patent_app_number] => 12699083 [rel_patent_id] =>[rel_patent_doc_number] =>)