Gerald Mcclain

Array ( [id] => 5427242 [patent_doc_number] => 20090086552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND ITS DRIVING METHOD' [patent_app_type] => utility [patent_app_number] => 12/240459 [patent_app_country] => US [patent_app_date] => 2008-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2526 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20090086552.pdf [firstpage_image] =>[orig_patent_app_number] => 12240459 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5308831 [patent_doc_number] => 20090016112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'Method of Programming a Flash Memory Device' [patent_app_type] => utility [patent_app_number] => 12/236916 [patent_app_country] => US [patent_app_date] => 2008-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8665 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20090016112.pdf [firstpage_image] =>[orig_patent_app_number] => 12236916 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4601655 [patent_doc_number] => 07978493 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-07-12 [patent_title] => 'Data encoding scheme to reduce sense current' [patent_app_type] => utility [patent_app_number] => 12/212801 [patent_app_country] => US [patent_app_date] => 2008-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4031 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/978/07978493.pdf [firstpage_image] =>[orig_patent_app_number] => 12212801 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4625602 [patent_doc_number] => 08004908 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-23 [patent_title] => 'Double edge triggered flip-flop circuit' [patent_app_type] => utility [patent_app_number] => 12/519255 [patent_app_country] => US [patent_app_date] => 2008-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9211 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/004/08004908.pdf [firstpage_image] =>[orig_patent_app_number] => 12519255 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5308836 [patent_doc_number] => 20090016117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'HIGH-SPEED VERIFIABLE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/210585 [patent_app_country] => US [patent_app_date] => 2008-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 11959 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20090016117.pdf [firstpage_image] =>[orig_patent_app_number] => 12210585 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 46558 [patent_doc_number] => 07778101 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-17 [patent_title] => 'Memory module and method of performing the same' [patent_app_type] => utility [patent_app_number] => 12/205501 [patent_app_country] => US [patent_app_date] => 2008-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3220 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/778/07778101.pdf [firstpage_image] =>[orig_patent_app_number] => 12205501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5451200 [patent_doc_number] => 20090067236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/204409 [patent_app_country] => US [patent_app_date] => 2008-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8796 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20090067236.pdf [firstpage_image] =>[orig_patent_app_number] => 12204409 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5451219 [patent_doc_number] => 20090067255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY INCLUDING MEMORY CELL FOR STORING MULTILEVEL DATA HAVING TWO OR MORE VALUES' [patent_app_type] => utility [patent_app_number] => 12/204207 [patent_app_country] => US [patent_app_date] => 2008-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6551 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20090067255.pdf [firstpage_image] =>[orig_patent_app_number] => 12204207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5321658 [patent_doc_number] => 20090059648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'FERROELECTRIC SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/201349 [patent_app_country] => US [patent_app_date] => 2008-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4110 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20090059648.pdf [firstpage_image] =>[orig_patent_app_number] => 12201349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7732231 [patent_doc_number] => 08102696 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-24 [patent_title] => 'Nonvolatile memory device and method of writing data to nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 12/677421 [patent_app_country] => US [patent_app_date] => 2008-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 21758 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 369 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/102/08102696.pdf [firstpage_image] =>[orig_patent_app_number] => 12677421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 84212 [patent_doc_number] => 07746693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'Nonvolatile analog memory' [patent_app_type] => utility [patent_app_number] => 12/192137 [patent_app_country] => US [patent_app_date] => 2008-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4778 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/746/07746693.pdf [firstpage_image] =>[orig_patent_app_number] => 12192137 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6459485 [patent_doc_number] => 20100039867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-18 [patent_title] => 'Electrically Isolated Gated Diode Nonvolatile Memory' [patent_app_type] => utility [patent_app_number] => 12/192797 [patent_app_country] => US [patent_app_date] => 2008-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 10523 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20100039867.pdf [firstpage_image] =>[orig_patent_app_number] => 12192797 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4571146 [patent_doc_number] => 07839680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Electrically erasable programmable read-only memory (EEPROM) cell and methods for forming and reading the same' [patent_app_type] => utility [patent_app_number] => 12/192839 [patent_app_country] => US [patent_app_date] => 2008-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 7760 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/839/07839680.pdf [firstpage_image] =>[orig_patent_app_number] => 12192839 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 124273 [patent_doc_number] => 07710793 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'Write voltage generating circuit and method' [patent_app_type] => utility [patent_app_number] => 12/191537 [patent_app_country] => US [patent_app_date] => 2008-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 5455 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/710/07710793.pdf [firstpage_image] =>[orig_patent_app_number] => 12191537 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4447762 [patent_doc_number] => 07864589 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Mitigation of runaway programming of a memory device' [patent_app_type] => utility [patent_app_number] => 12/191523 [patent_app_country] => US [patent_app_date] => 2008-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4315 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/864/07864589.pdf [firstpage_image] =>[orig_patent_app_number] => 12191523 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4777327 [patent_doc_number] => 20080285325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'Semiconductor Memory Device' [patent_app_type] => utility [patent_app_number] => 12/186204 [patent_app_country] => US [patent_app_date] => 2008-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 10361 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20080285325.pdf [firstpage_image] =>[orig_patent_app_number] => 12186204 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 84256 [patent_doc_number] => 07746721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'Word line driver circuit' [patent_app_type] => utility [patent_app_number] => 12/177885 [patent_app_country] => US [patent_app_date] => 2008-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4329 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/746/07746721.pdf [firstpage_image] =>[orig_patent_app_number] => 12177885 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7003 [patent_doc_number] => 07813179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Semiconductor memory device having plural word lines arranged at narrow pitch and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 12/178089 [patent_app_country] => US [patent_app_date] => 2008-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 9138 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/813/07813179.pdf [firstpage_image] =>[orig_patent_app_number] => 12178089 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5390359 [patent_doc_number] => 20090207672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'SYNCHRONOUS MEMORY DEVICES AND CONTROL METHODS FOR PERFORMING BURST WRITE OPERATIONS' [patent_app_type] => utility [patent_app_number] => 12/176997 [patent_app_country] => US [patent_app_date] => 2008-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4365 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20090207672.pdf [firstpage_image] =>[orig_patent_app_number] => 12176997 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6517844 [patent_doc_number] => 20100014364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-21 [patent_title] => 'MEMORY SYSTEM AND METHOD USING STACKED MEMORY DEVICE DICE, AND SYSTEM USING THE MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/176951 [patent_app_country] => US [patent_app_date] => 2008-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5669 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20100014364.pdf [firstpage_image] =>[orig_patent_app_number] => 12176951 [rel_patent_id] =>[rel_patent_doc_number] =>)