Search

Gerald Mcclain

Examiner (ID: 7690, Phone: (571)272-7803 , Office: P/3652 )

Most Active Art Unit
3652
Art Unit(s)
3653, 3652
Total Applications
1263
Issued Applications
964
Pending Applications
88
Abandoned Applications
234

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5191908 [patent_doc_number] => 20070080390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Memory transistor and memory unit with asymmetrical pocket doping region' [patent_app_type] => utility [patent_app_number] => 11/431265 [patent_app_country] => US [patent_app_date] => 2006-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4730 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20070080390.pdf [firstpage_image] =>[orig_patent_app_number] => 11431265 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/431265
Memory transistor and memory unit with asymmetrical pocket doping region May 9, 2006 Issued
Array ( [id] => 5782309 [patent_doc_number] => 20060203558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-14 [patent_title] => 'Non-volatile semiconductor memory adapted to store a multi-valued data in a single memory cell' [patent_app_type] => utility [patent_app_number] => 11/417185 [patent_app_country] => US [patent_app_date] => 2006-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 15417 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20060203558.pdf [firstpage_image] =>[orig_patent_app_number] => 11417185 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/417185
Non-volatile semiconductor memory adapted to store a multi-valued data in a single memory cell May 3, 2006 Issued
Array ( [id] => 916540 [patent_doc_number] => 07327606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-05 [patent_title] => 'Flash memory device and method of programming the same' [patent_app_type] => utility [patent_app_number] => 11/381579 [patent_app_country] => US [patent_app_date] => 2006-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8628 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/327/07327606.pdf [firstpage_image] =>[orig_patent_app_number] => 11381579 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/381579
Flash memory device and method of programming the same May 3, 2006 Issued
Array ( [id] => 831069 [patent_doc_number] => 07400533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-15 [patent_title] => 'Mimicking program verify drain resistance in a memory device' [patent_app_type] => utility [patent_app_number] => 11/417577 [patent_app_country] => US [patent_app_date] => 2006-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4100 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/400/07400533.pdf [firstpage_image] =>[orig_patent_app_number] => 11417577 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/417577
Mimicking program verify drain resistance in a memory device May 3, 2006 Issued
Array ( [id] => 377936 [patent_doc_number] => 07313040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-25 [patent_title] => 'Dynamic sense amplifier for SRAM' [patent_app_type] => utility [patent_app_number] => 11/417805 [patent_app_country] => US [patent_app_date] => 2006-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3312 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/313/07313040.pdf [firstpage_image] =>[orig_patent_app_number] => 11417805 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/417805
Dynamic sense amplifier for SRAM May 2, 2006 Issued
Array ( [id] => 449051 [patent_doc_number] => 07254054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-07 [patent_title] => 'Magnetic random access memory and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/380962 [patent_app_country] => US [patent_app_date] => 2006-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 26 [patent_no_of_words] => 11961 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/254/07254054.pdf [firstpage_image] =>[orig_patent_app_number] => 11380962 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/380962
Magnetic random access memory and method for manufacturing the same Apr 30, 2006 Issued
Array ( [id] => 5223972 [patent_doc_number] => 20070253238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-01 [patent_title] => 'Semiconductor memory device with information loss self-detect capability' [patent_app_type] => utility [patent_app_number] => 11/415879 [patent_app_country] => US [patent_app_date] => 2006-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7547 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20070253238.pdf [firstpage_image] =>[orig_patent_app_number] => 11415879 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/415879
Semiconductor memory device with information loss self-detect capability Apr 30, 2006 Issued
Array ( [id] => 5052904 [patent_doc_number] => 20070033449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'FLASH MEMORY DEVICE AND METHOD OF REPAIRING DEFECTS AND TRIMMING VOLTAGES' [patent_app_type] => utility [patent_app_number] => 11/380749 [patent_app_country] => US [patent_app_date] => 2006-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4063 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20070033449.pdf [firstpage_image] =>[orig_patent_app_number] => 11380749 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/380749
Flash memory device and method of repairing defects and trimming voltages Apr 27, 2006 Issued
Array ( [id] => 346134 [patent_doc_number] => 07499326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-03 [patent_title] => 'Apparatus for reducing the impact of program disturb' [patent_app_type] => utility [patent_app_number] => 11/413683 [patent_app_country] => US [patent_app_date] => 2006-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 14276 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/499/07499326.pdf [firstpage_image] =>[orig_patent_app_number] => 11413683 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/413683
Apparatus for reducing the impact of program disturb Apr 27, 2006 Issued
Array ( [id] => 5704125 [patent_doc_number] => 20060193173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Non-volatile semiconductor memory device and data programming method' [patent_app_type] => utility [patent_app_number] => 11/414631 [patent_app_country] => US [patent_app_date] => 2006-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 24975 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20060193173.pdf [firstpage_image] =>[orig_patent_app_number] => 11414631 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/414631
Non-volatile semiconductor memory device and data programming method Apr 26, 2006 Issued
Array ( [id] => 5212073 [patent_doc_number] => 20070250657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Data inversion device and method' [patent_app_type] => utility [patent_app_number] => 11/410635 [patent_app_country] => US [patent_app_date] => 2006-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3447 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0250/20070250657.pdf [firstpage_image] =>[orig_patent_app_number] => 11410635 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/410635
Data inversion device and method Apr 24, 2006 Issued
Array ( [id] => 834788 [patent_doc_number] => 07397695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-08 [patent_title] => 'Semiconductor memory apparatus and method for writing in the memory' [patent_app_type] => utility [patent_app_number] => 11/409097 [patent_app_country] => US [patent_app_date] => 2006-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4632 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/397/07397695.pdf [firstpage_image] =>[orig_patent_app_number] => 11409097 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/409097
Semiconductor memory apparatus and method for writing in the memory Apr 23, 2006 Issued
Array ( [id] => 5618204 [patent_doc_number] => 20060187737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Pattern layout of word line transfer transistors in NAND flash memory which executes subblock erase' [patent_app_type] => utility [patent_app_number] => 11/407146 [patent_app_country] => US [patent_app_date] => 2006-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6179 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20060187737.pdf [firstpage_image] =>[orig_patent_app_number] => 11407146 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/407146
Pattern layout of word line transfer transistors in NAND flash memory which executes subblock erase Apr 19, 2006 Issued
Array ( [id] => 815019 [patent_doc_number] => 07414883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-19 [patent_title] => 'Programming a normally single phase chalcogenide material for use as a memory or FPLA' [patent_app_type] => utility [patent_app_number] => 11/407573 [patent_app_country] => US [patent_app_date] => 2006-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3773 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/414/07414883.pdf [firstpage_image] =>[orig_patent_app_number] => 11407573 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/407573
Programming a normally single phase chalcogenide material for use as a memory or FPLA Apr 19, 2006 Issued
Array ( [id] => 564286 [patent_doc_number] => 07468901 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-23 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/399397 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 45 [patent_no_of_words] => 10361 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/468/07468901.pdf [firstpage_image] =>[orig_patent_app_number] => 11399397 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/399397
Semiconductor memory device Apr 6, 2006 Issued
Array ( [id] => 910002 [patent_doc_number] => 07333368 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-19 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/398771 [patent_app_country] => US [patent_app_date] => 2006-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 9185 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/333/07333368.pdf [firstpage_image] =>[orig_patent_app_number] => 11398771 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/398771
Semiconductor memory device Apr 5, 2006 Issued
Array ( [id] => 5624083 [patent_doc_number] => 20060262588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Memory circuit containing a chain of stages' [patent_app_type] => utility [patent_app_number] => 11/398491 [patent_app_country] => US [patent_app_date] => 2006-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5822 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20060262588.pdf [firstpage_image] =>[orig_patent_app_number] => 11398491 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/398491
Memory circuit containing a chain of stages Apr 4, 2006 Issued
Array ( [id] => 5919505 [patent_doc_number] => 20060239069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'Semiconductor integrated circuit device having nonvolatile semiconductor memory and programming method thereof' [patent_app_type] => utility [patent_app_number] => 11/397725 [patent_app_country] => US [patent_app_date] => 2006-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4350 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20060239069.pdf [firstpage_image] =>[orig_patent_app_number] => 11397725 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/397725
Semiconductor integrated circuit device having nonvolatile semiconductor memory and programming method thereof Apr 4, 2006 Issued
Array ( [id] => 846171 [patent_doc_number] => 07389381 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-06-17 [patent_title] => 'Branching memory-bus module with multiple downlink ports to standard fully-buffered memory modules' [patent_app_type] => utility [patent_app_number] => 11/308545 [patent_app_country] => US [patent_app_date] => 2006-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/389/07389381.pdf [firstpage_image] =>[orig_patent_app_number] => 11308545 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/308545
Branching memory-bus module with multiple downlink ports to standard fully-buffered memory modules Apr 4, 2006 Issued
Array ( [id] => 507362 [patent_doc_number] => 07206231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'System for programming non-volatile memory with self-adjusting maximum program loop' [patent_app_type] => utility [patent_app_number] => 11/394441 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 10428 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/206/07206231.pdf [firstpage_image] =>[orig_patent_app_number] => 11394441 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/394441
System for programming non-volatile memory with self-adjusting maximum program loop Mar 30, 2006 Issued
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