Search

Gerald Mcclain

Examiner (ID: 7690, Phone: (571)272-7803 , Office: P/3652 )

Most Active Art Unit
3652
Art Unit(s)
3653, 3652
Total Applications
1263
Issued Applications
964
Pending Applications
88
Abandoned Applications
234

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 528156 [patent_doc_number] => 07190628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-13 [patent_title] => 'Semiconductor memory device having self refresh mode and related method of operation' [patent_app_type] => utility [patent_app_number] => 11/328237 [patent_app_country] => US [patent_app_date] => 2006-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3157 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/190/07190628.pdf [firstpage_image] =>[orig_patent_app_number] => 11328237 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/328237
Semiconductor memory device having self refresh mode and related method of operation Jan 9, 2006 Issued
Array ( [id] => 926355 [patent_doc_number] => 07317655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-08 [patent_title] => 'Memory cell array biasing method and a semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/327967 [patent_app_country] => US [patent_app_date] => 2006-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3973 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/317/07317655.pdf [firstpage_image] =>[orig_patent_app_number] => 11327967 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/327967
Memory cell array biasing method and a semiconductor memory device Jan 8, 2006 Issued
Array ( [id] => 503259 [patent_doc_number] => 07209385 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-04-24 [patent_title] => 'Array structure for assisted-charge memory devices' [patent_app_type] => utility [patent_app_number] => 11/327561 [patent_app_country] => US [patent_app_date] => 2006-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 4299 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/209/07209385.pdf [firstpage_image] =>[orig_patent_app_number] => 11327561 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/327561
Array structure for assisted-charge memory devices Jan 5, 2006 Issued
Array ( [id] => 475554 [patent_doc_number] => 07230860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-12 [patent_title] => 'Voltage pumping device' [patent_app_type] => utility [patent_app_number] => 11/275461 [patent_app_country] => US [patent_app_date] => 2006-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 8136 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/230/07230860.pdf [firstpage_image] =>[orig_patent_app_number] => 11275461 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/275461
Voltage pumping device Jan 5, 2006 Issued
Array ( [id] => 437192 [patent_doc_number] => 07263026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-28 [patent_title] => 'Semiconductor memory device and method for controlling the same' [patent_app_type] => utility [patent_app_number] => 11/327247 [patent_app_country] => US [patent_app_date] => 2006-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3637 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/263/07263026.pdf [firstpage_image] =>[orig_patent_app_number] => 11327247 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/327247
Semiconductor memory device and method for controlling the same Jan 4, 2006 Issued
Array ( [id] => 5562789 [patent_doc_number] => 20090135641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-28 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/921755 [patent_app_country] => US [patent_app_date] => 2006-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9538 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20090135641.pdf [firstpage_image] =>[orig_patent_app_number] => 11921755 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/921755
Semiconductor memory device Jan 4, 2006 Issued
Array ( [id] => 5612792 [patent_doc_number] => 20060114720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-01 [patent_title] => 'Semiconductor memory device for storing multivalued data' [patent_app_type] => utility [patent_app_number] => 11/325917 [patent_app_country] => US [patent_app_date] => 2006-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 29192 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20060114720.pdf [firstpage_image] =>[orig_patent_app_number] => 11325917 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/325917
Semiconductor memory device for storing multivalued data Jan 3, 2006 Issued
Array ( [id] => 5140450 [patent_doc_number] => 20070002666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Current Reduction Circuit of Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 11/275421 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3759 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20070002666.pdf [firstpage_image] =>[orig_patent_app_number] => 11275421 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/275421
Current reduction circuit of semiconductor device Dec 29, 2005 Issued
Array ( [id] => 463479 [patent_doc_number] => 07242616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-10 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/321865 [patent_app_country] => US [patent_app_date] => 2005-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 6604 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/242/07242616.pdf [firstpage_image] =>[orig_patent_app_number] => 11321865 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/321865
Non-volatile semiconductor memory device Dec 29, 2005 Issued
Array ( [id] => 430090 [patent_doc_number] => 07269085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-11 [patent_title] => 'Non volatile semiconductor memory device having a multi-bit cell array' [patent_app_type] => utility [patent_app_number] => 11/317429 [patent_app_country] => US [patent_app_date] => 2005-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3541 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/269/07269085.pdf [firstpage_image] =>[orig_patent_app_number] => 11317429 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/317429
Non volatile semiconductor memory device having a multi-bit cell array Dec 22, 2005 Issued
Array ( [id] => 441360 [patent_doc_number] => 07260017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-21 [patent_title] => 'Non-volatile memory device having buffer memory with improve read speed' [patent_app_type] => utility [patent_app_number] => 11/306069 [patent_app_country] => US [patent_app_date] => 2005-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3480 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/260/07260017.pdf [firstpage_image] =>[orig_patent_app_number] => 11306069 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/306069
Non-volatile memory device having buffer memory with improve read speed Dec 14, 2005 Issued
Array ( [id] => 445221 [patent_doc_number] => 07257047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-14 [patent_title] => 'Page buffer circuit of flash memory device with improved read operation function and method of controlling read operation thereof' [patent_app_type] => utility [patent_app_number] => 11/306073 [patent_app_country] => US [patent_app_date] => 2005-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7844 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/257/07257047.pdf [firstpage_image] =>[orig_patent_app_number] => 11306073 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/306073
Page buffer circuit of flash memory device with improved read operation function and method of controlling read operation thereof Dec 14, 2005 Issued
Array ( [id] => 923972 [patent_doc_number] => 07319604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-01-15 [patent_title] => 'Electronic memory device having high density non-volatile memory cells and a reduced capacitive interference cell-to-cell' [patent_app_type] => utility [patent_app_number] => 11/300053 [patent_app_country] => US [patent_app_date] => 2005-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 24 [patent_no_of_words] => 4246 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/319/07319604.pdf [firstpage_image] =>[orig_patent_app_number] => 11300053 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/300053
Electronic memory device having high density non-volatile memory cells and a reduced capacitive interference cell-to-cell Dec 13, 2005 Issued
Array ( [id] => 433664 [patent_doc_number] => 07266037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-04 [patent_title] => 'Semiconductor memory device with hierarchical I/O line architecture' [patent_app_type] => utility [patent_app_number] => 11/299765 [patent_app_country] => US [patent_app_date] => 2005-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15579 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/266/07266037.pdf [firstpage_image] =>[orig_patent_app_number] => 11299765 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/299765
Semiconductor memory device with hierarchical I/O line architecture Dec 12, 2005 Issued
Array ( [id] => 5698788 [patent_doc_number] => 20060215472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Memory device having shared open bit line sense amplifier architecture' [patent_app_type] => utility [patent_app_number] => 11/300009 [patent_app_country] => US [patent_app_date] => 2005-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5043 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20060215472.pdf [firstpage_image] =>[orig_patent_app_number] => 11300009 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/300009
Memory device having shared open bit line sense amplifier architecture Dec 12, 2005 Issued
Array ( [id] => 430016 [patent_doc_number] => 07269060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-11 [patent_title] => 'Magnetic random access memory' [patent_app_type] => utility [patent_app_number] => 11/298597 [patent_app_country] => US [patent_app_date] => 2005-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 24 [patent_no_of_words] => 7272 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/269/07269060.pdf [firstpage_image] =>[orig_patent_app_number] => 11298597 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/298597
Magnetic random access memory Dec 11, 2005 Issued
Array ( [id] => 5654262 [patent_doc_number] => 20060139997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Flash memory device' [patent_app_type] => utility [patent_app_number] => 11/299063 [patent_app_country] => US [patent_app_date] => 2005-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6281 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20060139997.pdf [firstpage_image] =>[orig_patent_app_number] => 11299063 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/299063
Flash memory device Dec 8, 2005 Issued
Array ( [id] => 5251793 [patent_doc_number] => 20070133249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'Single level cell programming in a multiple level cell non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 11/298013 [patent_app_country] => US [patent_app_date] => 2005-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4738 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20070133249.pdf [firstpage_image] =>[orig_patent_app_number] => 11298013 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/298013
Single level cell programming in a multiple level cell non-volatile memory device Dec 8, 2005 Issued
Array ( [id] => 5758656 [patent_doc_number] => 20060209601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Page buffer for preventing program fail in check board program of non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 11/299249 [patent_app_country] => US [patent_app_date] => 2005-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3742 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20060209601.pdf [firstpage_image] =>[orig_patent_app_number] => 11299249 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/299249
Page buffer for preventing program fail in check board program of non-volatile memory device Dec 8, 2005 Issued
Array ( [id] => 517751 [patent_doc_number] => 07196933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-27 [patent_title] => 'High-speed verifiable semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/297467 [patent_app_country] => US [patent_app_date] => 2005-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 47 [patent_no_of_words] => 11890 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/196/07196933.pdf [firstpage_image] =>[orig_patent_app_number] => 11297467 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/297467
High-speed verifiable semiconductor memory device Dec 8, 2005 Issued
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