Search

Gerald Mcclain

Examiner (ID: 7690, Phone: (571)272-7803 , Office: P/3652 )

Most Active Art Unit
3652
Art Unit(s)
3653, 3652
Total Applications
1263
Issued Applications
964
Pending Applications
88
Abandoned Applications
234

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 466993 [patent_doc_number] => 07239550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-03 [patent_title] => 'Method of programming a non-volatile memory cell' [patent_app_type] => utility [patent_app_number] => 11/255905 [patent_app_country] => US [patent_app_date] => 2005-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2555 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/239/07239550.pdf [firstpage_image] =>[orig_patent_app_number] => 11255905 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/255905
Method of programming a non-volatile memory cell Oct 19, 2005 Issued
Array ( [id] => 624928 [patent_doc_number] => 07139201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'Non-volatile semiconductor memory device and memory system using the same' [patent_app_type] => utility [patent_app_number] => 11/243985 [patent_app_country] => US [patent_app_date] => 2005-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 99 [patent_figures_cnt] => 153 [patent_no_of_words] => 29481 [patent_no_of_claims] => 74 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/139/07139201.pdf [firstpage_image] =>[orig_patent_app_number] => 11243985 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/243985
Non-volatile semiconductor memory device and memory system using the same Oct 5, 2005 Issued
Array ( [id] => 5074207 [patent_doc_number] => 20070014182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'Nonvolatile semiconductor memory device which reads by decreasing effective threshold voltage of selector gate transistor' [patent_app_type] => utility [patent_app_number] => 11/242895 [patent_app_country] => US [patent_app_date] => 2005-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5435 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20070014182.pdf [firstpage_image] =>[orig_patent_app_number] => 11242895 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/242895
Nonvolatile semiconductor memory device which reads by decreasing effective threshold voltage of selector gate transistor Oct 4, 2005 Issued
Array ( [id] => 471344 [patent_doc_number] => 07233536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-19 [patent_title] => 'Semiconductor memory device having memory cells to store cell data and reference data' [patent_app_type] => utility [patent_app_number] => 11/239219 [patent_app_country] => US [patent_app_date] => 2005-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 33 [patent_no_of_words] => 13214 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/233/07233536.pdf [firstpage_image] =>[orig_patent_app_number] => 11239219 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/239219
Semiconductor memory device having memory cells to store cell data and reference data Sep 29, 2005 Issued
Array ( [id] => 5170252 [patent_doc_number] => 20070070683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Random access memory including first and second voltage sources' [patent_app_type] => utility [patent_app_number] => 11/236933 [patent_app_country] => US [patent_app_date] => 2005-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11086 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20070070683.pdf [firstpage_image] =>[orig_patent_app_number] => 11236933 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/236933
Random access memory including first and second voltage sources Sep 27, 2005 Issued
Array ( [id] => 445209 [patent_doc_number] => 07257040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-14 [patent_title] => 'Fast pre-charge circuit and method of providing same for memory devices' [patent_app_type] => utility [patent_app_number] => 11/236347 [patent_app_country] => US [patent_app_date] => 2005-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2657 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/257/07257040.pdf [firstpage_image] =>[orig_patent_app_number] => 11236347 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/236347
Fast pre-charge circuit and method of providing same for memory devices Sep 26, 2005 Issued
Array ( [id] => 5170238 [patent_doc_number] => 20070070669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology' [patent_app_type] => utility [patent_app_number] => 11/236401 [patent_app_country] => US [patent_app_date] => 2005-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12072 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20070070669.pdf [firstpage_image] =>[orig_patent_app_number] => 11236401 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/236401
Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology Sep 25, 2005 Issued
Array ( [id] => 5105605 [patent_doc_number] => 20070064480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'Multi-bit flash memory device having improved program rate' [patent_app_type] => utility [patent_app_number] => 11/229519 [patent_app_country] => US [patent_app_date] => 2005-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7270 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20070064480.pdf [firstpage_image] =>[orig_patent_app_number] => 11229519 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/229519
Multi-bit flash memory device having improved program rate Sep 19, 2005 Issued
Array ( [id] => 498836 [patent_doc_number] => 07212425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-01 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/228311 [patent_app_country] => US [patent_app_date] => 2005-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 58 [patent_no_of_words] => 18391 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/212/07212425.pdf [firstpage_image] =>[orig_patent_app_number] => 11228311 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/228311
Semiconductor integrated circuit device Sep 18, 2005 Issued
Array ( [id] => 674420 [patent_doc_number] => 07092286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Electrically programmable memory element with reduced area of contact' [patent_app_type] => utility [patent_app_number] => 11/221627 [patent_app_country] => US [patent_app_date] => 2005-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 69 [patent_no_of_words] => 10683 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/092/07092286.pdf [firstpage_image] =>[orig_patent_app_number] => 11221627 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/221627
Electrically programmable memory element with reduced area of contact Sep 7, 2005 Issued
Array ( [id] => 5900628 [patent_doc_number] => 20060044916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Zero-enabled fuse-set' [patent_app_type] => utility [patent_app_number] => 11/220231 [patent_app_country] => US [patent_app_date] => 2005-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7910 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20060044916.pdf [firstpage_image] =>[orig_patent_app_number] => 11220231 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/220231
Zero-enabled fuse-set Sep 5, 2005 Issued
Array ( [id] => 6976623 [patent_doc_number] => 20050286338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Adjustable timing circuit of an integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/217921 [patent_app_country] => US [patent_app_date] => 2005-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4060 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20050286338.pdf [firstpage_image] =>[orig_patent_app_number] => 11217921 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/217921
Adjustable timing circuit of an integrated circuit Aug 31, 2005 Issued
Array ( [id] => 617871 [patent_doc_number] => 07145815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-05 [patent_title] => 'Active termination control' [patent_app_type] => utility [patent_app_number] => 11/215988 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 9017 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/145/07145815.pdf [firstpage_image] =>[orig_patent_app_number] => 11215988 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/215988
Active termination control Aug 30, 2005 Issued
Array ( [id] => 639769 [patent_doc_number] => 07126863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-24 [patent_title] => 'Active termination control' [patent_app_type] => utility [patent_app_number] => 11/216207 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8923 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/126/07126863.pdf [firstpage_image] =>[orig_patent_app_number] => 11216207 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216207
Active termination control Aug 30, 2005 Issued
Array ( [id] => 5147243 [patent_doc_number] => 20070047297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Resistance variable memory element with threshold device and method of forming the same' [patent_app_type] => utility [patent_app_number] => 11/214991 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4263 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20070047297.pdf [firstpage_image] =>[orig_patent_app_number] => 11214991 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/214991
Resistance variable memory element with threshold device and method of forming the same Aug 30, 2005 Issued
Array ( [id] => 5147260 [patent_doc_number] => 20070047314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Programming method for NAND EEPROM' [patent_app_type] => utility [patent_app_number] => 11/215933 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8563 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20070047314.pdf [firstpage_image] =>[orig_patent_app_number] => 11215933 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/215933
Programming method for NAND EEPROM Aug 30, 2005 Issued
Array ( [id] => 635977 [patent_doc_number] => 07130228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-31 [patent_title] => 'Active termination control through module register' [patent_app_type] => utility [patent_app_number] => 11/217056 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8923 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/130/07130228.pdf [firstpage_image] =>[orig_patent_app_number] => 11217056 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/217056
Active termination control through module register Aug 30, 2005 Issued
Array ( [id] => 836196 [patent_doc_number] => 07398342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-08 [patent_title] => 'Active termination control' [patent_app_type] => utility [patent_app_number] => 11/216353 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8932 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/398/07398342.pdf [firstpage_image] =>[orig_patent_app_number] => 11216353 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216353
Active termination control Aug 30, 2005 Issued
Array ( [id] => 494454 [patent_doc_number] => 07215566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-08 [patent_title] => 'Magnetroresistive random access memory and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/214869 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 4077 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/215/07215566.pdf [firstpage_image] =>[orig_patent_app_number] => 11214869 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/214869
Magnetroresistive random access memory and method of manufacturing the same Aug 30, 2005 Issued
Array ( [id] => 6976604 [patent_doc_number] => 20050286319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Active termination control' [patent_app_type] => utility [patent_app_number] => 11/216672 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9011 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20050286319.pdf [firstpage_image] =>[orig_patent_app_number] => 11216672 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216672
Active termination control Aug 30, 2005 Issued
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