Search

Gerald Mcclain

Examiner (ID: 7690, Phone: (571)272-7803 , Office: P/3652 )

Most Active Art Unit
3652
Art Unit(s)
3653, 3652
Total Applications
1263
Issued Applications
964
Pending Applications
88
Abandoned Applications
234

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5752541 [patent_doc_number] => 20060221690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Test mode for detecting a floating word line' [patent_app_type] => utility [patent_app_number] => 11/098998 [patent_app_country] => US [patent_app_date] => 2005-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4014 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20060221690.pdf [firstpage_image] =>[orig_patent_app_number] => 11098998 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/098998
Test mode for detecting a floating word line Apr 4, 2005 Issued
Array ( [id] => 5589739 [patent_doc_number] => 20060039190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'Method of writing to MRAM devices' [patent_app_type] => utility [patent_app_number] => 11/097495 [patent_app_country] => US [patent_app_date] => 2005-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7626 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20060039190.pdf [firstpage_image] =>[orig_patent_app_number] => 11097495 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/097495
Method of writing to MRAM devices Mar 31, 2005 Issued
Array ( [id] => 936193 [patent_doc_number] => 06975543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Nonvolatile semiconductor memory device which stores two bits per memory cell' [patent_app_type] => utility [patent_app_number] => 11/085133 [patent_app_country] => US [patent_app_date] => 2005-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5153 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/975/06975543.pdf [firstpage_image] =>[orig_patent_app_number] => 11085133 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/085133
Nonvolatile semiconductor memory device which stores two bits per memory cell Mar 21, 2005 Issued
Array ( [id] => 784575 [patent_doc_number] => 06992944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-31 [patent_title] => 'Semiconductor memory device with reduced power consumption for refresh operation' [patent_app_type] => utility [patent_app_number] => 11/079427 [patent_app_country] => US [patent_app_date] => 2005-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 6529 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/992/06992944.pdf [firstpage_image] =>[orig_patent_app_number] => 11079427 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/079427
Semiconductor memory device with reduced power consumption for refresh operation Mar 14, 2005 Issued
Array ( [id] => 718923 [patent_doc_number] => 07054208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'Method and device for testing a sense amp' [patent_app_type] => utility [patent_app_number] => 11/076472 [patent_app_country] => US [patent_app_date] => 2005-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 7476 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/054/07054208.pdf [firstpage_image] =>[orig_patent_app_number] => 11076472 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/076472
Method and device for testing a sense amp Mar 7, 2005 Issued
Array ( [id] => 5704128 [patent_doc_number] => 20060193176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Multiple level programming in a non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 11/067977 [patent_app_country] => US [patent_app_date] => 2005-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20060193176.pdf [firstpage_image] =>[orig_patent_app_number] => 11067977 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/067977
Multiple level programming in a non-volatile memory device Feb 27, 2005 Issued
Array ( [id] => 5704119 [patent_doc_number] => 20060193167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Compact non-volatile memory array with reduced disturb' [patent_app_type] => utility [patent_app_number] => 11/068625 [patent_app_country] => US [patent_app_date] => 2005-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3073 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20060193167.pdf [firstpage_image] =>[orig_patent_app_number] => 11068625 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/068625
Compact non-volatile memory array with reduced disturb Feb 27, 2005 Issued
Array ( [id] => 7180096 [patent_doc_number] => 20050190591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-01 [patent_title] => 'Dynamic semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/064837 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12523 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20050190591.pdf [firstpage_image] =>[orig_patent_app_number] => 11064837 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/064837
Dynamic semiconductor memory device Feb 24, 2005 Issued
Array ( [id] => 5704118 [patent_doc_number] => 20060193166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Semiconductor device and method of operating a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/066731 [patent_app_country] => US [patent_app_date] => 2005-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5614 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20060193166.pdf [firstpage_image] =>[orig_patent_app_number] => 11066731 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/066731
Semiconductor device and method of operating a semiconductor device Feb 24, 2005 Issued
Array ( [id] => 661101 [patent_doc_number] => 07106613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Memory module and a method of arranging a signal line of the same' [patent_app_type] => utility [patent_app_number] => 11/064671 [patent_app_country] => US [patent_app_date] => 2005-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4655 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/106/07106613.pdf [firstpage_image] =>[orig_patent_app_number] => 11064671 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/064671
Memory module and a method of arranging a signal line of the same Feb 23, 2005 Issued
Array ( [id] => 678379 [patent_doc_number] => 07088607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'Static memory cell and SRAM device' [patent_app_type] => utility [patent_app_number] => 11/064909 [patent_app_country] => US [patent_app_date] => 2005-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 12051 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/088/07088607.pdf [firstpage_image] =>[orig_patent_app_number] => 11064909 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/064909
Static memory cell and SRAM device Feb 23, 2005 Issued
Array ( [id] => 5618194 [patent_doc_number] => 20060187727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Self-addressed subarray precharge' [patent_app_type] => utility [patent_app_number] => 11/064353 [patent_app_country] => US [patent_app_date] => 2005-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20060187727.pdf [firstpage_image] =>[orig_patent_app_number] => 11064353 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/064353
Self-addressed subarray precharge Feb 22, 2005 Issued
Array ( [id] => 7049582 [patent_doc_number] => 20050185469 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-25 [patent_title] => 'Reverse voltage generation circuit' [patent_app_type] => utility [patent_app_number] => 11/058429 [patent_app_country] => US [patent_app_date] => 2005-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3765 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20050185469.pdf [firstpage_image] =>[orig_patent_app_number] => 11058429 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/058429
Reverse voltage generation circuit Feb 15, 2005 Issued
Array ( [id] => 5671380 [patent_doc_number] => 20060176734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'DOUBLE-DECKER MRAM CELLS WITH SCISSOR-STATE ANGLED REFERENCE LAYER MAGNETIC ANISOTROPY AND METHOD FOR FABRICATING' [patent_app_type] => utility [patent_app_number] => 11/054735 [patent_app_country] => US [patent_app_date] => 2005-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4494 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20060176734.pdf [firstpage_image] =>[orig_patent_app_number] => 11054735 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/054735
Double-decker MRAM cells with scissor-state angled reference layer magnetic anisotropy and method for fabricating Feb 9, 2005 Issued
Array ( [id] => 5670244 [patent_doc_number] => 20060175598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-10 [patent_title] => 'Memory device including barrier layer for improved switching speed and data retention' [patent_app_type] => utility [patent_app_number] => 11/052689 [patent_app_country] => US [patent_app_date] => 2005-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2404 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20060175598.pdf [firstpage_image] =>[orig_patent_app_number] => 11052689 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/052689
Memory device including barrier layer for improved switching speed and data retention Feb 6, 2005 Issued
Array ( [id] => 762090 [patent_doc_number] => 07016241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-21 [patent_title] => 'Semiconductor device, nonvolatile semiconductor memory, system including a plurality of semiconductor devices or nonvolatile semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used' [patent_app_type] => utility [patent_app_number] => 11/052558 [patent_app_country] => US [patent_app_date] => 2005-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 7201 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/016/07016241.pdf [firstpage_image] =>[orig_patent_app_number] => 11052558 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/052558
Semiconductor device, nonvolatile semiconductor memory, system including a plurality of semiconductor devices or nonvolatile semiconductor memories, electric card including semiconductor device or nonvolatile semiconductor memory, and electric device with which this electric card can be used Feb 6, 2005 Issued
Array ( [id] => 678395 [patent_doc_number] => 07088616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell' [patent_app_type] => utility [patent_app_number] => 11/049535 [patent_app_country] => US [patent_app_date] => 2005-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 15474 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/088/07088616.pdf [firstpage_image] =>[orig_patent_app_number] => 11049535 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/049535
Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell Feb 2, 2005 Issued
Array ( [id] => 652210 [patent_doc_number] => 07113423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-26 [patent_title] => 'Method of forming a negative differential resistance device' [patent_app_type] => utility [patent_app_number] => 11/045535 [patent_app_country] => US [patent_app_date] => 2005-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 27 [patent_no_of_words] => 14928 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/113/07113423.pdf [firstpage_image] =>[orig_patent_app_number] => 11045535 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/045535
Method of forming a negative differential resistance device Jan 27, 2005 Issued
Array ( [id] => 661100 [patent_doc_number] => 07106612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Semiconductor memory device using tapered arrangement of local input and output sense amplifiers' [patent_app_type] => utility [patent_app_number] => 11/043935 [patent_app_country] => US [patent_app_date] => 2005-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2607 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/106/07106612.pdf [firstpage_image] =>[orig_patent_app_number] => 11043935 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/043935
Semiconductor memory device using tapered arrangement of local input and output sense amplifiers Jan 27, 2005 Issued
Array ( [id] => 710454 [patent_doc_number] => 07061786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Semiconductor memory device and memory system' [patent_app_type] => utility [patent_app_number] => 11/042200 [patent_app_country] => US [patent_app_date] => 2005-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4912 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/061/07061786.pdf [firstpage_image] =>[orig_patent_app_number] => 11042200 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/042200
Semiconductor memory device and memory system Jan 25, 2005 Issued
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