Gerald Mcclain

Array ( [id] => 7398241 [patent_doc_number] => 20040174732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/794633 [patent_app_country] => US [patent_app_date] => 2004-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9331 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20040174732.pdf [firstpage_image] =>[orig_patent_app_number] => 10794633 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 674454 [patent_doc_number] => 07092299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'Memory devices, systems and methods using selective on-die termination' [patent_app_type] => utility [patent_app_number] => 10/792623 [patent_app_country] => US [patent_app_date] => 2004-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4034 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/092/07092299.pdf [firstpage_image] =>[orig_patent_app_number] => 10792623 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7338189 [patent_doc_number] => 20040190346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Differential non-volatile memory device and bit reading method for the same' [patent_app_type] => new [patent_app_number] => 10/792033 [patent_app_country] => US [patent_app_date] => 2004-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3231 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20040190346.pdf [firstpage_image] =>[orig_patent_app_number] => 10792033 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 997866 [patent_doc_number] => 06914840 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Semiconductor memory circuit' [patent_app_type] => utility [patent_app_number] => 10/790135 [patent_app_country] => US [patent_app_date] => 2004-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 8148 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/914/06914840.pdf [firstpage_image] =>[orig_patent_app_number] => 10790135 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1082207 [patent_doc_number] => 06836426 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-28 [patent_title] => 'Semiconductor memory device with proper sensing timing' [patent_app_type] => B1 [patent_app_number] => 10/786333 [patent_app_country] => US [patent_app_date] => 2004-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 6643 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/836/06836426.pdf [firstpage_image] =>[orig_patent_app_number] => 10786333 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 437159 [patent_doc_number] => 07263012 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-28 [patent_title] => 'Semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 10/545749 [patent_app_country] => US [patent_app_date] => 2004-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3050 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/263/07263012.pdf [firstpage_image] =>[orig_patent_app_number] => 10545749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7421098 [patent_doc_number] => 20040160816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Memory device comprising single transistor having functions of RAM and ROM and methods for operating and manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/776233 [patent_app_country] => US [patent_app_date] => 2004-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7177 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20040160816.pdf [firstpage_image] =>[orig_patent_app_number] => 10776233 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7414758 [patent_doc_number] => 20040159877 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Semiconductor memory device and memory system' [patent_app_type] => new [patent_app_number] => 10/775068 [patent_app_country] => US [patent_app_date] => 2004-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4991 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20040159877.pdf [firstpage_image] =>[orig_patent_app_number] => 10775068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7440119 [patent_doc_number] => 20040162934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'System and method for multiplexing data and data masking information on a data bus of a memory device' [patent_app_type] => new [patent_app_number] => 10/776896 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5017 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20040162934.pdf [firstpage_image] =>[orig_patent_app_number] => 10776896 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6937727 [patent_doc_number] => 20050111288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Semiconductor memory device and storage method thereof' [patent_app_type] => utility [patent_app_number] => 10/762827 [patent_app_country] => US [patent_app_date] => 2004-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 26582 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20050111288.pdf [firstpage_image] =>[orig_patent_app_number] => 10762827 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 973921 [patent_doc_number] => 06937506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Magnetic memory device' [patent_app_type] => utility [patent_app_number] => 10/753539 [patent_app_country] => US [patent_app_date] => 2004-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3045 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/937/06937506.pdf [firstpage_image] =>[orig_patent_app_number] => 10753539 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1026602 [patent_doc_number] => 06885601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Memory circuit and method of reading data' [patent_app_type] => utility [patent_app_number] => 10/747241 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3797 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885601.pdf [firstpage_image] =>[orig_patent_app_number] => 10747241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7102639 [patent_doc_number] => 20050105365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'REPAIR FUSE BOX OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 10/743939 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1414 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20050105365.pdf [firstpage_image] =>[orig_patent_app_number] => 10743939 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6999603 [patent_doc_number] => 20050138301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-23 [patent_title] => 'Using a processor to program a semiconductor memory' [patent_app_type] => utility [patent_app_number] => 10/744035 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1938 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20050138301.pdf [firstpage_image] =>[orig_patent_app_number] => 10744035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1084391 [patent_doc_number] => 06834010 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-21 [patent_title] => 'Temperature dependent write current source for magnetic tunnel junction MRAM' [patent_app_type] => B1 [patent_app_number] => 10/741841 [patent_app_country] => US [patent_app_date] => 2003-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3955 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/834/06834010.pdf [firstpage_image] =>[orig_patent_app_number] => 10741841 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7338207 [patent_doc_number] => 20040190354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Method of programming a flash memory cell and method of programming an NAND flash memory using the same' [patent_app_type] => new [patent_app_number] => 10/738235 [patent_app_country] => US [patent_app_date] => 2003-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3070 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20040190354.pdf [firstpage_image] =>[orig_patent_app_number] => 10738235 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7297861 [patent_doc_number] => 20040125683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/734249 [patent_app_country] => US [patent_app_date] => 2003-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9399 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20040125683.pdf [firstpage_image] =>[orig_patent_app_number] => 10734249 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 614127 [patent_doc_number] => 07149110 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-12 [patent_title] => 'Seek window verify program system and method for a multilevel non-volatile memory integrated circuit system' [patent_app_type] => utility [patent_app_number] => 10/737689 [patent_app_country] => US [patent_app_date] => 2003-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 86 [patent_figures_cnt] => 98 [patent_no_of_words] => 47137 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/149/07149110.pdf [firstpage_image] =>[orig_patent_app_number] => 10737689 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1067431 [patent_doc_number] => 06847578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-25 [patent_title] => 'Semiconductor integrated circuit and data processing system' [patent_app_type] => utility [patent_app_number] => 10/729934 [patent_app_country] => US [patent_app_date] => 2003-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 13843 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/847/06847578.pdf [firstpage_image] =>[orig_patent_app_number] => 10729934 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7463687 [patent_doc_number] => 20040120203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Dynamic register with low clock rate testing capability' [patent_app_type] => new [patent_app_number] => 10/731078 [patent_app_country] => US [patent_app_date] => 2003-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20040120203.pdf [firstpage_image] =>[orig_patent_app_number] => 10731078 [rel_patent_id] =>[rel_patent_doc_number] =>)