
Gerald Mcclain
Examiner (ID: 7690, Phone: (571)272-7803 , Office: P/3652 )
| Most Active Art Unit | 3652 |
| Art Unit(s) | 3653, 3652 |
| Total Applications | 1263 |
| Issued Applications | 964 |
| Pending Applications | 88 |
| Abandoned Applications | 234 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1158244
[patent_doc_number] => 06771531
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-08-03
[patent_title] => 'Memory device and memory system using same'
[patent_app_type] => B2
[patent_app_number] => 10/350039
[patent_app_country] => US
[patent_app_date] => 2003-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 26
[patent_no_of_words] => 11520
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/771/06771531.pdf
[firstpage_image] =>[orig_patent_app_number] => 10350039
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/350039 | Memory device and memory system using same | Jan 23, 2003 | Issued |
Array
(
[id] => 6705230
[patent_doc_number] => 20030151964
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-14
[patent_title] => 'Semiconductor memory and control method'
[patent_app_type] => new
[patent_app_number] => 10/333935
[patent_app_country] => US
[patent_app_date] => 2003-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8684
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0151/20030151964.pdf
[firstpage_image] =>[orig_patent_app_number] => 10333935
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/333935 | Semiconductor memory and control method | Jan 22, 2003 | Issued |
Array
(
[id] => 6864343
[patent_doc_number] => 20030189869
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-09
[patent_title] => 'Semiconductor integrated circuit device having hierarchical power source arrangement'
[patent_app_type] => new
[patent_app_number] => 10/347220
[patent_app_country] => US
[patent_app_date] => 2003-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 53
[patent_figures_cnt] => 53
[patent_no_of_words] => 50443
[patent_no_of_claims] => 73
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0189/20030189869.pdf
[firstpage_image] =>[orig_patent_app_number] => 10347220
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/347220 | Semiconductor integrated circuit device having hierarchical power source arrangement | Jan 20, 2003 | Issued |
Array
(
[id] => 7306359
[patent_doc_number] => 20040141384
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-22
[patent_title] => 'METHOD AND SYSTEM FOR SELECTING REDUNDANT ROWS AND COLUMNS OF MEMORY CELLS'
[patent_app_type] => new
[patent_app_number] => 10/347041
[patent_app_country] => US
[patent_app_date] => 2003-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 10645
[patent_no_of_claims] => 75
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0141/20040141384.pdf
[firstpage_image] =>[orig_patent_app_number] => 10347041
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/347041 | Method and system for selecting redundant rows and columns of memory cells | Jan 16, 2003 | Issued |
Array
(
[id] => 1220107
[patent_doc_number] => 06707751
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-03-16
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => B2
[patent_app_number] => 10/339339
[patent_app_country] => US
[patent_app_date] => 2003-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 18
[patent_no_of_words] => 9477
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/707/06707751.pdf
[firstpage_image] =>[orig_patent_app_number] => 10339339
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/339339 | Semiconductor integrated circuit device | Jan 9, 2003 | Issued |
Array
(
[id] => 1191118
[patent_doc_number] => 06735119
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-05-11
[patent_title] => 'Nonvolatile semiconductor memory'
[patent_app_type] => B2
[patent_app_number] => 10/338635
[patent_app_country] => US
[patent_app_date] => 2003-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 6224
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 337
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/735/06735119.pdf
[firstpage_image] =>[orig_patent_app_number] => 10338635
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/338635 | Nonvolatile semiconductor memory | Jan 8, 2003 | Issued |
Array
(
[id] => 6841103
[patent_doc_number] => 20030146450
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-07
[patent_title] => 'Booster circuit for non-volatile semiconductor memory device'
[patent_app_type] => new
[patent_app_number] => 10/338833
[patent_app_country] => US
[patent_app_date] => 2003-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7736
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0146/20030146450.pdf
[firstpage_image] =>[orig_patent_app_number] => 10338833
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/338833 | Booster circuit for non-volatile semiconductor memory device | Jan 8, 2003 | Issued |
Array
(
[id] => 1180302
[patent_doc_number] => 06751146
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-06-15
[patent_title] => 'System and method for charge restoration in a non-volatile memory device'
[patent_app_type] => B1
[patent_app_number] => 10/338333
[patent_app_country] => US
[patent_app_date] => 2003-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3869
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/751/06751146.pdf
[firstpage_image] =>[orig_patent_app_number] => 10338333
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/338333 | System and method for charge restoration in a non-volatile memory device | Jan 6, 2003 | Issued |
Array
(
[id] => 1156185
[patent_doc_number] => 06775200
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-08-10
[patent_title] => 'Software based memory design generator'
[patent_app_type] => B1
[patent_app_number] => 10/336137
[patent_app_country] => US
[patent_app_date] => 2003-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 4820
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/775/06775200.pdf
[firstpage_image] =>[orig_patent_app_number] => 10336137
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/336137 | Software based memory design generator | Jan 2, 2003 | Issued |
Array
(
[id] => 7673692
[patent_doc_number] => 20040128426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-01
[patent_title] => 'Memory system that measures power consumption'
[patent_app_type] => new
[patent_app_number] => 10/331333
[patent_app_country] => US
[patent_app_date] => 2002-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2853
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0128/20040128426.pdf
[firstpage_image] =>[orig_patent_app_number] => 10331333
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/331333 | Memory system that measures power consumption | Dec 30, 2002 | Issued |
Array
(
[id] => 6681964
[patent_doc_number] => 20030117828
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-06-26
[patent_title] => 'Semiconductor chip'
[patent_app_type] => new
[patent_app_number] => 10/331535
[patent_app_country] => US
[patent_app_date] => 2002-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3204
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0117/20030117828.pdf
[firstpage_image] =>[orig_patent_app_number] => 10331535
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/331535 | Semiconductor chip | Dec 29, 2002 | Issued |
Array
(
[id] => 6804144
[patent_doc_number] => 20030231538
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-18
[patent_title] => 'Static ram with flash-clear function'
[patent_app_type] => new
[patent_app_number] => 10/331135
[patent_app_country] => US
[patent_app_date] => 2002-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5827
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 26
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0231/20030231538.pdf
[firstpage_image] =>[orig_patent_app_number] => 10331135
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/331135 | Static RAM with flash-clear function | Dec 26, 2002 | Issued |
Array
(
[id] => 7623000
[patent_doc_number] => 06687165
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-02-03
[patent_title] => 'Temperature-compensated output buffer circuit'
[patent_app_type] => B1
[patent_app_number] => 10/329839
[patent_app_country] => US
[patent_app_date] => 2002-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5138
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 5
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/687/06687165.pdf
[firstpage_image] =>[orig_patent_app_number] => 10329839
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/329839 | Temperature-compensated output buffer circuit | Dec 25, 2002 | Issued |
Array
(
[id] => 7297809
[patent_doc_number] => 20040125652
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-01
[patent_title] => 'INTEGRATED CIRCUIT EMBEDDED WITH SINGLE-POLY NON-VOLATILE MEMORY'
[patent_app_type] => new
[patent_app_number] => 10/248193
[patent_app_country] => US
[patent_app_date] => 2002-12-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 3529
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0125/20040125652.pdf
[firstpage_image] =>[orig_patent_app_number] => 10248193
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/248193 | Integrated circuit embedded with single-poly non-volatile memory | Dec 24, 2002 | Issued |
Array
(
[id] => 7463554
[patent_doc_number] => 20040120186
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-24
[patent_title] => 'Array containing charge storage and dummy transistors and method of operating the array'
[patent_app_type] => new
[patent_app_number] => 10/325737
[patent_app_country] => US
[patent_app_date] => 2002-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 10266
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0120/20040120186.pdf
[firstpage_image] =>[orig_patent_app_number] => 10325737
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/325737 | Array containing charge storage and dummy transistors and method of operating the array | Dec 22, 2002 | Issued |
Array
(
[id] => 1108254
[patent_doc_number] => 06813215
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-02
[patent_title] => 'Memory having multiple write ports and method of operation'
[patent_app_type] => B2
[patent_app_number] => 10/326091
[patent_app_country] => US
[patent_app_date] => 2002-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3913
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/813/06813215.pdf
[firstpage_image] =>[orig_patent_app_number] => 10326091
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/326091 | Memory having multiple write ports and method of operation | Dec 22, 2002 | Issued |
Array
(
[id] => 6681963
[patent_doc_number] => 20030117827
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-06-26
[patent_title] => 'Semiconductor memory device and write/readout controlling method error correction code decoding device'
[patent_app_type] => new
[patent_app_number] => 10/328435
[patent_app_country] => US
[patent_app_date] => 2002-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 22535
[patent_no_of_claims] => 48
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0117/20030117827.pdf
[firstpage_image] =>[orig_patent_app_number] => 10328435
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/328435 | Semiconductor memory device and write/readout controlling method error correction code decoding device | Dec 22, 2002 | Issued |
Array
(
[id] => 6786650
[patent_doc_number] => 20030137889
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-24
[patent_title] => 'Method for discharging word line and semicondcutor memory device using the same'
[patent_app_type] => new
[patent_app_number] => 10/324207
[patent_app_country] => US
[patent_app_date] => 2002-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3912
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0137/20030137889.pdf
[firstpage_image] =>[orig_patent_app_number] => 10324207
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/324207 | Method for discharging word line and semiconductor memory device using the same | Dec 18, 2002 | Issued |
Array
(
[id] => 1332309
[patent_doc_number] => 06603706
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-05
[patent_title] => 'Method and apparatus for synchronization of read data in a read data synchronization circuit'
[patent_app_type] => B1
[patent_app_number] => 10/322933
[patent_app_country] => US
[patent_app_date] => 2002-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3627
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/603/06603706.pdf
[firstpage_image] =>[orig_patent_app_number] => 10322933
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/322933 | Method and apparatus for synchronization of read data in a read data synchronization circuit | Dec 17, 2002 | Issued |
Array
(
[id] => 1042164
[patent_doc_number] => 06870786
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-22
[patent_title] => 'SEMICONDUCTOR DEVICE, NONVOLATILE SEMICONDUCTOR MEMORY, SYSTEM INCLUDING A PLURALITY OF SEMICONDUCTOR DEVICES OR NONVOLATILE SEMICONDUCTOR MEMORIES, ELECTRIC CARD INCLUDING SEMICONDUCTOR DEVICE OR NONVOLATILE SEMICONDUCTOR MEMORY, AND ELECTRIC DEVICE WITH WHICH THIS ELECTRIC CARD CAN BE USED'
[patent_app_type] => utility
[patent_app_number] => 10/322349
[patent_app_country] => US
[patent_app_date] => 2002-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 25
[patent_no_of_words] => 7175
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/870/06870786.pdf
[firstpage_image] =>[orig_patent_app_number] => 10322349
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/322349 | SEMICONDUCTOR DEVICE, NONVOLATILE SEMICONDUCTOR MEMORY, SYSTEM INCLUDING A PLURALITY OF SEMICONDUCTOR DEVICES OR NONVOLATILE SEMICONDUCTOR MEMORIES, ELECTRIC CARD INCLUDING SEMICONDUCTOR DEVICE OR NONVOLATILE SEMICONDUCTOR MEMORY, AND ELECTRIC DEVICE WITH WHICH THIS ELECTRIC CARD CAN BE USED | Dec 17, 2002 | Issued |