
Gerald Mcclain
Examiner (ID: 7690, Phone: (571)272-7803 , Office: P/3652 )
| Most Active Art Unit | 3652 |
| Art Unit(s) | 3653, 3652 |
| Total Applications | 1263 |
| Issued Applications | 964 |
| Pending Applications | 88 |
| Abandoned Applications | 234 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1310496
[patent_doc_number] => 06621731
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-09-16
[patent_title] => 'Magnetic memory device'
[patent_app_type] => B2
[patent_app_number] => 10/144231
[patent_app_country] => US
[patent_app_date] => 2002-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 4936
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/621/06621731.pdf
[firstpage_image] =>[orig_patent_app_number] => 10144231
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/144231 | Magnetic memory device | May 9, 2002 | Issued |
Array
(
[id] => 6415240
[patent_doc_number] => 20020125538
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-12
[patent_title] => 'Array organization for high-performance memory devices'
[patent_app_type] => new
[patent_app_number] => 10/134837
[patent_app_country] => US
[patent_app_date] => 2002-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7153
[patent_no_of_claims] => 59
[patent_no_of_ind_claims] => 15
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0125/20020125538.pdf
[firstpage_image] =>[orig_patent_app_number] => 10134837
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/134837 | Array organization for high-performance memory devices | Apr 28, 2002 | Issued |
Array
(
[id] => 6534244
[patent_doc_number] => 20020110014
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-15
[patent_title] => 'Recording system, data recording apparatus, memory apparatus, and data recording method'
[patent_app_type] => new
[patent_app_number] => 10/118402
[patent_app_country] => US
[patent_app_date] => 2002-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6508
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0110/20020110014.pdf
[firstpage_image] =>[orig_patent_app_number] => 10118402
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/118402 | Recording system, data recording apparatus, memory apparatus, and data recording method | Apr 7, 2002 | Issued |
| 10/116827 | Integrated memory having a bit line reference voltage, and a method for producing the bit line reference voltage | Apr 4, 2002 | Abandoned |
Array
(
[id] => 1416611
[patent_doc_number] => 06538914
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-25
[patent_title] => 'Ferroelectric memory with bit-plate parallel architecture and operating method thereof'
[patent_app_type] => B1
[patent_app_number] => 10/114535
[patent_app_country] => US
[patent_app_date] => 2002-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 4540
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/538/06538914.pdf
[firstpage_image] =>[orig_patent_app_number] => 10114535
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/114535 | Ferroelectric memory with bit-plate parallel architecture and operating method thereof | Mar 31, 2002 | Issued |
Array
(
[id] => 969903
[patent_doc_number] => 06940772
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-09-06
[patent_title] => 'Reference cells for TCCT based memory cells'
[patent_app_type] => utility
[patent_app_number] => 10/100705
[patent_app_country] => US
[patent_app_date] => 2002-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 5605
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/940/06940772.pdf
[firstpage_image] =>[orig_patent_app_number] => 10100705
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/100705 | Reference cells for TCCT based memory cells | Mar 17, 2002 | Issued |
Array
(
[id] => 6728890
[patent_doc_number] => 20030185080
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-02
[patent_title] => 'Circuit for programming antifuse bits'
[patent_app_type] => new
[patent_app_number] => 10/098262
[patent_app_country] => US
[patent_app_date] => 2002-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4201
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0185/20030185080.pdf
[firstpage_image] =>[orig_patent_app_number] => 10098262
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/098262 | Circuit for programming antifuse bits | Mar 14, 2002 | Issued |
Array
(
[id] => 6728890
[patent_doc_number] => 20030185080
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-02
[patent_title] => 'Circuit for programming antifuse bits'
[patent_app_type] => new
[patent_app_number] => 10/098262
[patent_app_country] => US
[patent_app_date] => 2002-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4201
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0185/20030185080.pdf
[firstpage_image] =>[orig_patent_app_number] => 10098262
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/098262 | Circuit for programming antifuse bits | Mar 14, 2002 | Issued |
Array
(
[id] => 1410244
[patent_doc_number] => 06545909
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-04-08
[patent_title] => 'Nonvolatile semiconductor memory device'
[patent_app_type] => B2
[patent_app_number] => 10/094215
[patent_app_country] => US
[patent_app_date] => 2002-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 98
[patent_figures_cnt] => 124
[patent_no_of_words] => 60290
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/545/06545909.pdf
[firstpage_image] =>[orig_patent_app_number] => 10094215
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/094215 | Nonvolatile semiconductor memory device | Mar 10, 2002 | Issued |
Array
(
[id] => 5857717
[patent_doc_number] => 20020122328
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-05
[patent_title] => 'Ferroelectric random access memory'
[patent_app_type] => new
[patent_app_number] => 10/087837
[patent_app_country] => US
[patent_app_date] => 2002-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 14049
[patent_no_of_claims] => 43
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0122/20020122328.pdf
[firstpage_image] =>[orig_patent_app_number] => 10087837
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/087837 | Ferroelectric random access memory | Mar 4, 2002 | Issued |
Array
(
[id] => 5903552
[patent_doc_number] => 20020141240
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'Semiconductor device and a integrated circuit card'
[patent_app_type] => new
[patent_app_number] => 10/085037
[patent_app_country] => US
[patent_app_date] => 2002-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 14160
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 18
[patent_words_short_claim] => 29
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0141/20020141240.pdf
[firstpage_image] =>[orig_patent_app_number] => 10085037
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/085037 | Semiconductor device and a integrated circuit card | Feb 28, 2002 | Issued |
Array
(
[id] => 1349930
[patent_doc_number] => 06590796
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-07-08
[patent_title] => 'Semiconductor memory device with variably set data input-output terminals and control signal terminals for the same'
[patent_app_type] => B2
[patent_app_number] => 10/084929
[patent_app_country] => US
[patent_app_date] => 2002-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 9385
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/590/06590796.pdf
[firstpage_image] =>[orig_patent_app_number] => 10084929
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/084929 | Semiconductor memory device with variably set data input-output terminals and control signal terminals for the same | Feb 28, 2002 | Issued |
Array
(
[id] => 6422855
[patent_doc_number] => 20020126522
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-12
[patent_title] => 'Memory cell, nonvolatile memory device and control method therefor improving reliability under low power supply voltage'
[patent_app_type] => new
[patent_app_number] => 10/084339
[patent_app_country] => US
[patent_app_date] => 2002-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 11125
[patent_no_of_claims] => 56
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0126/20020126522.pdf
[firstpage_image] =>[orig_patent_app_number] => 10084339
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/084339 | Memory cell, nonvolatile memory device and control method therefor improving reliability under low power supply voltage | Feb 27, 2002 | Issued |
Array
(
[id] => 6371768
[patent_doc_number] => 20020118571
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-29
[patent_title] => 'Apparatus and method for programming voltage protection in a non-volatile memory system'
[patent_app_type] => new
[patent_app_number] => 10/082971
[patent_app_country] => US
[patent_app_date] => 2002-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6947
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0118/20020118571.pdf
[firstpage_image] =>[orig_patent_app_number] => 10082971
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/082971 | Apparatus and method for programming voltage protection in a non-volatile memory system | Feb 25, 2002 | Issued |
Array
(
[id] => 1319652
[patent_doc_number] => 06611445
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-08-26
[patent_title] => 'Content addressable memory having redundant circuit'
[patent_app_type] => B2
[patent_app_number] => 10/082229
[patent_app_country] => US
[patent_app_date] => 2002-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 6771
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 227
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/611/06611445.pdf
[firstpage_image] =>[orig_patent_app_number] => 10082229
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/082229 | Content addressable memory having redundant circuit | Feb 25, 2002 | Issued |
Array
(
[id] => 6833633
[patent_doc_number] => 20030161178
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-28
[patent_title] => 'Method and system for performing equipotential sensing across a memory array to eliminate leakage currents'
[patent_app_type] => new
[patent_app_number] => 10/084111
[patent_app_country] => US
[patent_app_date] => 2002-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4520
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0161/20030161178.pdf
[firstpage_image] =>[orig_patent_app_number] => 10084111
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/084111 | Method and system for performing equipotential sensing across a memory array to eliminate leakage currents | Feb 24, 2002 | Issued |
Array
(
[id] => 1212551
[patent_doc_number] => 06714460
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-03-30
[patent_title] => 'System and method for multiplexing data and data masking information on a data bus of a memory device'
[patent_app_type] => B2
[patent_app_number] => 10/081653
[patent_app_country] => US
[patent_app_date] => 2002-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4978
[patent_no_of_claims] => 53
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/714/06714460.pdf
[firstpage_image] =>[orig_patent_app_number] => 10081653
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/081653 | System and method for multiplexing data and data masking information on a data bus of a memory device | Feb 20, 2002 | Issued |
Array
(
[id] => 6739085
[patent_doc_number] => 20030156454
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-21
[patent_title] => 'Direct memory swapping between NAND flash and SRAM with error correction coding'
[patent_app_type] => new
[patent_app_number] => 10/081503
[patent_app_country] => US
[patent_app_date] => 2002-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8247
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0156/20030156454.pdf
[firstpage_image] =>[orig_patent_app_number] => 10081503
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/081503 | Direct memory swapping between NAND flash and SRAM with error correction coding | Feb 20, 2002 | Issued |
Array
(
[id] => 6749127
[patent_doc_number] => 20030043647
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-06
[patent_title] => 'Non-volatile semiconductor memory device'
[patent_app_type] => new
[patent_app_number] => 10/078471
[patent_app_country] => US
[patent_app_date] => 2002-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5433
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0043/20030043647.pdf
[firstpage_image] =>[orig_patent_app_number] => 10078471
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/078471 | Non-volatile semiconductor memory device | Feb 20, 2002 | Issued |
Array
(
[id] => 1346120
[patent_doc_number] => 06594169
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-07-15
[patent_title] => 'Semiconductor memory device and memory system'
[patent_app_type] => B2
[patent_app_number] => 10/078009
[patent_app_country] => US
[patent_app_date] => 2002-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 4900
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/594/06594169.pdf
[firstpage_image] =>[orig_patent_app_number] => 10078009
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/078009 | Semiconductor memory device and memory system | Feb 19, 2002 | Issued |