Search

Gerald Mcclain

Examiner (ID: 7690, Phone: (571)272-7803 , Office: P/3652 )

Most Active Art Unit
3652
Art Unit(s)
3653, 3652
Total Applications
1263
Issued Applications
964
Pending Applications
88
Abandoned Applications
234

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1425123 [patent_doc_number] => 06512690 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-28 [patent_title] => 'High sensitivity common source amplifier MRAM cell, memory array and read/write scheme' [patent_app_type] => B1 [patent_app_number] => 09/990425 [patent_app_country] => US [patent_app_date] => 2001-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3720 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/512/06512690.pdf [firstpage_image] =>[orig_patent_app_number] => 09990425 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/990425
High sensitivity common source amplifier MRAM cell, memory array and read/write scheme Nov 20, 2001 Issued
Array ( [id] => 5903619 [patent_doc_number] => 20020141269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'REFRESH METHOD CAPABLE OF REDUCING MEMORY CELL ACCESS TIME IN SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => new [patent_app_number] => 09/991725 [patent_app_country] => US [patent_app_date] => 2001-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2811 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20020141269.pdf [firstpage_image] =>[orig_patent_app_number] => 09991725 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/991725
Refresh method capable of reducing memory cell access time in semiconductor memory device Nov 13, 2001 Issued
Array ( [id] => 1149299 [patent_doc_number] => 06778424 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-17 [patent_title] => 'Semiconductor memory device and method of manufacturing the same' [patent_app_type] => B2 [patent_app_number] => 09/986777 [patent_app_country] => US [patent_app_date] => 2001-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 89 [patent_figures_cnt] => 140 [patent_no_of_words] => 21269 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/778/06778424.pdf [firstpage_image] =>[orig_patent_app_number] => 09986777 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/986777
Semiconductor memory device and method of manufacturing the same Nov 8, 2001 Issued
Array ( [id] => 1429306 [patent_doc_number] => 06515899 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-04 [patent_title] => 'Non-volatile memory cell with enhanced cell drive current' [patent_app_type] => B1 [patent_app_number] => 10/010011 [patent_app_country] => US [patent_app_date] => 2001-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2847 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/515/06515899.pdf [firstpage_image] =>[orig_patent_app_number] => 10010011 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/010011
Non-volatile memory cell with enhanced cell drive current Nov 8, 2001 Issued
Array ( [id] => 6790950 [patent_doc_number] => 20030086294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Multilevel memory system controller' [patent_app_type] => new [patent_app_number] => 09/985229 [patent_app_country] => US [patent_app_date] => 2001-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2311 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20030086294.pdf [firstpage_image] =>[orig_patent_app_number] => 09985229 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/985229
Multilevel memory system controller Nov 1, 2001 Abandoned
Array ( [id] => 1426187 [patent_doc_number] => 06510086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-21 [patent_title] => 'Nonvolatile semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 09/984918 [patent_app_country] => US [patent_app_date] => 2001-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 29 [patent_no_of_words] => 13986 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/510/06510086.pdf [firstpage_image] =>[orig_patent_app_number] => 09984918 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/984918
Nonvolatile semiconductor memory Oct 30, 2001 Issued
Array ( [id] => 7644639 [patent_doc_number] => 06473334 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-29 [patent_title] => 'Multi-ported SRAM cell with shared bit and word lines and separate read and write ports' [patent_app_type] => B1 [patent_app_number] => 10/003335 [patent_app_country] => US [patent_app_date] => 2001-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4990 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/473/06473334.pdf [firstpage_image] =>[orig_patent_app_number] => 10003335 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/003335
Multi-ported SRAM cell with shared bit and word lines and separate read and write ports Oct 30, 2001 Issued
Array ( [id] => 1520439 [patent_doc_number] => 06501689 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-31 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => B2 [patent_app_number] => 09/983717 [patent_app_country] => US [patent_app_date] => 2001-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 58 [patent_no_of_words] => 18319 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/501/06501689.pdf [firstpage_image] =>[orig_patent_app_number] => 09983717 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/983717
Semiconductor integrated circuit device Oct 24, 2001 Issued
Array ( [id] => 1292084 [patent_doc_number] => 06639859 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-28 [patent_title] => 'Test array and method for testing memory arrays' [patent_app_type] => B2 [patent_app_number] => 09/983697 [patent_app_country] => US [patent_app_date] => 2001-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3545 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/639/06639859.pdf [firstpage_image] =>[orig_patent_app_number] => 09983697 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/983697
Test array and method for testing memory arrays Oct 24, 2001 Issued
Array ( [id] => 6466838 [patent_doc_number] => 20020021617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-21 [patent_title] => 'Clock-synchronous semiconductor memory device' [patent_app_type] => new [patent_app_number] => 09/983383 [patent_app_country] => US [patent_app_date] => 2001-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5048 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20020021617.pdf [firstpage_image] =>[orig_patent_app_number] => 09983383 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/983383
Clock-synchronous semiconductor memory device Oct 23, 2001 Issued
Array ( [id] => 1216156 [patent_doc_number] => 06711079 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-23 [patent_title] => 'Data bus sense amplifier circuit' [patent_app_type] => B2 [patent_app_number] => 09/978789 [patent_app_country] => US [patent_app_date] => 2001-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2405 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/711/06711079.pdf [firstpage_image] =>[orig_patent_app_number] => 09978789 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/978789
Data bus sense amplifier circuit Oct 17, 2001 Issued
Array ( [id] => 1423617 [patent_doc_number] => 06529414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-04 [patent_title] => 'Nonvolatile semiconductor memory device including a circuit for providing a boosted potential' [patent_app_type] => B2 [patent_app_number] => 09/978252 [patent_app_country] => US [patent_app_date] => 2001-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 4938 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/529/06529414.pdf [firstpage_image] =>[orig_patent_app_number] => 09978252 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/978252
Nonvolatile semiconductor memory device including a circuit for providing a boosted potential Oct 16, 2001 Issued
Array ( [id] => 1306305 [patent_doc_number] => 06625077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-23 [patent_title] => 'Asynchronous hidden refresh of semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 09/976115 [patent_app_country] => US [patent_app_date] => 2001-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 6305 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625077.pdf [firstpage_image] =>[orig_patent_app_number] => 09976115 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/976115
Asynchronous hidden refresh of semiconductor memory Oct 10, 2001 Issued
Array ( [id] => 1368235 [patent_doc_number] => 06577539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-10 [patent_title] => 'Non-volatile semiconductor memory device with programming voltage generating system and data programming method' [patent_app_type] => B2 [patent_app_number] => 09/975631 [patent_app_country] => US [patent_app_date] => 2001-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 52 [patent_no_of_words] => 25120 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/577/06577539.pdf [firstpage_image] =>[orig_patent_app_number] => 09975631 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/975631
Non-volatile semiconductor memory device with programming voltage generating system and data programming method Oct 10, 2001 Issued
Array ( [id] => 6816856 [patent_doc_number] => 20030067814 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-10 [patent_title] => 'Apparatus and architecture for a compact flash memory controller' [patent_app_type] => new [patent_app_number] => 09/975563 [patent_app_country] => US [patent_app_date] => 2001-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3474 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20030067814.pdf [firstpage_image] =>[orig_patent_app_number] => 09975563 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/975563
Apparatus and architecture for a compact flash memory controller Oct 9, 2001 Issued
Array ( [id] => 1454464 [patent_doc_number] => 06456559 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => B1 [patent_app_number] => 09/971227 [patent_app_country] => US [patent_app_date] => 2001-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 9829 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/456/06456559.pdf [firstpage_image] =>[orig_patent_app_number] => 09971227 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/971227
Semiconductor integrated circuit Oct 3, 2001 Issued
Array ( [id] => 5813782 [patent_doc_number] => 20020039311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-04 [patent_title] => 'Non-volatile semiconductor memory' [patent_app_type] => new [patent_app_number] => 09/968983 [patent_app_country] => US [patent_app_date] => 2001-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12399 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20020039311.pdf [firstpage_image] =>[orig_patent_app_number] => 09968983 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/968983
Non-volatile semiconductor memory Oct 2, 2001 Issued
Array ( [id] => 6782064 [patent_doc_number] => 20030063511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Leakage-tolerant memory arrangements' [patent_app_type] => new [patent_app_number] => 09/966193 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8756 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20030063511.pdf [firstpage_image] =>[orig_patent_app_number] => 09966193 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/966193
Leakage-tolerant memory arrangements Sep 27, 2001 Issued
Array ( [id] => 6534304 [patent_doc_number] => 20020110018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Semiconductor memory device' [patent_app_type] => new [patent_app_number] => 09/963681 [patent_app_country] => US [patent_app_date] => 2001-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8133 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20020110018.pdf [firstpage_image] =>[orig_patent_app_number] => 09963681 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/963681
Semiconductor memory device Sep 26, 2001 Issued
Array ( [id] => 6400483 [patent_doc_number] => 20020036944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-28 [patent_title] => 'Semiconductor memory, semiconductor integrated circuit and semiconductor mounted device' [patent_app_type] => new [patent_app_number] => 09/962159 [patent_app_country] => US [patent_app_date] => 2001-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10684 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20020036944.pdf [firstpage_image] =>[orig_patent_app_number] => 09962159 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/962159
Semiconductor memory, semiconductor integrated circuit and semiconductor mounted device Sep 25, 2001 Issued
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