Search

Gerald P. Tolin

Examiner (ID: 182)

Most Active Art Unit
2103
Art Unit(s)
2103, 2105, 2104, 2504, 2835, 2899, 2107, 3201, 3621
Total Applications
2170
Issued Applications
1900
Pending Applications
26
Abandoned Applications
244

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18661340 [patent_doc_number] => 20230307354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 18/320235 [patent_app_country] => US [patent_app_date] => 2023-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4897 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18320235 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/320235
SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME May 18, 2023 Pending
Array ( [id] => 20334456 [patent_doc_number] => 12464752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Method of forming shaped source/drain epitaxial layers of a semiconductor device [patent_app_type] => utility [patent_app_number] => 18/198644 [patent_app_country] => US [patent_app_date] => 2023-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18198644 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/198644
Method of forming shaped source/drain epitaxial layers of a semiconductor device May 16, 2023 Issued
Array ( [id] => 20146804 [patent_doc_number] => 12381151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Semiconductor device and semiconductor package including the same [patent_app_type] => utility [patent_app_number] => 18/196077 [patent_app_country] => US [patent_app_date] => 2023-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 21 [patent_no_of_words] => 2229 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18196077 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/196077
Semiconductor device and semiconductor package including the same May 10, 2023 Issued
Array ( [id] => 19384667 [patent_doc_number] => 20240274537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => SENSING DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/308353 [patent_app_country] => US [patent_app_date] => 2023-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8269 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18308353 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/308353
SENSING DEVICE AND MANUFACTURING METHOD THEREOF Apr 26, 2023 Pending
Array ( [id] => 18586004 [patent_doc_number] => 20230268269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => INTEGRATED INDUCTOR WITH A STACKED METAL WIRE [patent_app_type] => utility [patent_app_number] => 18/140198 [patent_app_country] => US [patent_app_date] => 2023-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7417 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18140198 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/140198
Integrated inductor with a stacked metal wire Apr 26, 2023 Issued
Array ( [id] => 19531771 [patent_doc_number] => 20240355673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => HYBRID MOLYBDENUM FILL SCHEME FOR LOW RESISTIVITY SEMICONDUCTOR APPLICATIONS [patent_app_type] => utility [patent_app_number] => 18/136970 [patent_app_country] => US [patent_app_date] => 2023-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18136970 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/136970
HYBRID MOLYBDENUM FILL SCHEME FOR LOW RESISTIVITY SEMICONDUCTOR APPLICATIONS Apr 19, 2023 Pending
Array ( [id] => 19484024 [patent_doc_number] => 20240332066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/136888 [patent_app_country] => US [patent_app_date] => 2023-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18136888 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/136888
SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF Apr 19, 2023 Pending
Array ( [id] => 18555230 [patent_doc_number] => 20230253247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => INTERCONNECT STRUCTURE WITH DIELECTRIC CAP LAYER AND ETCH STOP LAYER STACK [patent_app_type] => utility [patent_app_number] => 18/301577 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18301577 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/301577
INTERCONNECT STRUCTURE WITH DIELECTRIC CAP LAYER AND ETCH STOP LAYER STACK Apr 16, 2023 Pending
Array ( [id] => 19515765 [patent_doc_number] => 20240347451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => INTERCONNECTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/134529 [patent_app_country] => US [patent_app_date] => 2023-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18134529 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/134529
INTERCONNECTION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME Apr 12, 2023 Pending
Array ( [id] => 19086210 [patent_doc_number] => 20240113011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => Semiconductor Structures And Methods Of Forming The Same [patent_app_type] => utility [patent_app_number] => 18/194224 [patent_app_country] => US [patent_app_date] => 2023-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7336 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18194224 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/194224
Semiconductor Structures And Methods Of Forming The Same Mar 30, 2023 Pending
Array ( [id] => 19484023 [patent_doc_number] => 20240332065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => INTERCONNECT STRUCTURE FOR MULTI-THICKNESS SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/191290 [patent_app_country] => US [patent_app_date] => 2023-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18191290 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/191290
Interconnect structure for multi-thickness semiconductor device Mar 27, 2023 Issued
Array ( [id] => 19484032 [patent_doc_number] => 20240332074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => METAL WIRES WITH EXPANDED SIDEWALLS [patent_app_type] => utility [patent_app_number] => 18/190175 [patent_app_country] => US [patent_app_date] => 2023-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18190175 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/190175
METAL WIRES WITH EXPANDED SIDEWALLS Mar 26, 2023 Pending
Array ( [id] => 19468069 [patent_doc_number] => 20240321739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => TUNABLE W-SHAPED PROFILE FOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/189850 [patent_app_country] => US [patent_app_date] => 2023-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8836 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18189850 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/189850
TUNABLE W-SHAPED PROFILE FOR STRUCTURES Mar 23, 2023 Pending
Array ( [id] => 18661362 [patent_doc_number] => 20230307376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => Power Semiconductor Module with Two Opposite Half-Bridges [patent_app_type] => utility [patent_app_number] => 18/188555 [patent_app_country] => US [patent_app_date] => 2023-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188555 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/188555
Power Semiconductor Module with Two Opposite Half-Bridges Mar 22, 2023 Abandoned
Array ( [id] => 18500680 [patent_doc_number] => 20230223476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/124339 [patent_app_country] => US [patent_app_date] => 2023-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18124339 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/124339
Semiconductor device Mar 20, 2023 Issued
Array ( [id] => 19467963 [patent_doc_number] => 20240321633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => ULTRA-THIN LAYERS BY SELECTIVE PASSIVATION [patent_app_type] => utility [patent_app_number] => 18/123101 [patent_app_country] => US [patent_app_date] => 2023-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7644 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18123101 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/123101
ULTRA-THIN LAYERS BY SELECTIVE PASSIVATION Mar 16, 2023 Pending
Array ( [id] => 18906094 [patent_doc_number] => 20240021579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/185248 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18185248 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/185248
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Mar 15, 2023 Pending
Array ( [id] => 19193496 [patent_doc_number] => 20240172409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => MEMORY DEVICE WITH ALTERNATING METAL LINES [patent_app_type] => utility [patent_app_number] => 18/184380 [patent_app_country] => US [patent_app_date] => 2023-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8597 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184380 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/184380
MEMORY DEVICE WITH ALTERNATING METAL LINES Mar 14, 2023 Pending
Array ( [id] => 19007871 [patent_doc_number] => 20240071942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SEMICONDUCTOR CHIP, SEMICONDUCTOR PACKAGE INCLUDING THE SAME, AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/120826 [patent_app_country] => US [patent_app_date] => 2023-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7501 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18120826 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/120826
SEMICONDUCTOR CHIP, SEMICONDUCTOR PACKAGE INCLUDING THE SAME, AND METHOD OF FABRICATING THE SAME Mar 12, 2023 Pending
Array ( [id] => 18833795 [patent_doc_number] => 20230402322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/182583 [patent_app_country] => US [patent_app_date] => 2023-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11820 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18182583 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/182583
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Mar 12, 2023 Pending
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