Search

Gerald R. Ewoldt

Examiner (ID: 11995, Phone: (571)272-0843 , Office: P/1644 )

Most Active Art Unit
1644
Art Unit(s)
1644
Total Applications
1060
Issued Applications
256
Pending Applications
142
Abandoned Applications
661

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12202368 [patent_doc_number] => 09905440 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-02-27 [patent_title] => 'Method of manufacturing an electronic device and electronic device manufactured thereby' [patent_app_type] => utility [patent_app_number] => 15/249201 [patent_app_country] => US [patent_app_date] => 2016-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 7236 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15249201 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/249201
Method of manufacturing an electronic device and electronic device manufactured thereby Aug 25, 2016 Issued
Array ( [id] => 13019467 [patent_doc_number] => 10032853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Microstructural architecture to enable strain relieved non-linear complex oxide thin films [patent_app_type] => utility [patent_app_number] => 15/248015 [patent_app_country] => US [patent_app_date] => 2016-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7886 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15248015 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/248015
Microstructural architecture to enable strain relieved non-linear complex oxide thin films Aug 25, 2016 Issued
Array ( [id] => 11817865 [patent_doc_number] => 09721823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-01 [patent_title] => 'Method of transferring micro-device' [patent_app_type] => utility [patent_app_number] => 15/248070 [patent_app_country] => US [patent_app_date] => 2016-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 5515 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15248070 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/248070
Method of transferring micro-device Aug 25, 2016 Issued
Array ( [id] => 11339487 [patent_doc_number] => 20160365243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'Method of Manufacturing Semiconductor Device and Substrate Processing Method' [patent_app_type] => utility [patent_app_number] => 15/248833 [patent_app_country] => US [patent_app_date] => 2016-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 36176 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15248833 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/248833
Method of manufacturing semiconductor device and substrate processing method Aug 25, 2016 Issued
Array ( [id] => 13242835 [patent_doc_number] => 10134625 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Shallow trench isolation structure and fabricating method thereof [patent_app_type] => utility [patent_app_number] => 15/249205 [patent_app_country] => US [patent_app_date] => 2016-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4865 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15249205 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/249205
Shallow trench isolation structure and fabricating method thereof Aug 25, 2016 Issued
Array ( [id] => 12068817 [patent_doc_number] => 09831381 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => 'Package substrate machining method' [patent_app_type] => utility [patent_app_number] => 15/248097 [patent_app_country] => US [patent_app_date] => 2016-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3531 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15248097 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/248097
Package substrate machining method Aug 25, 2016 Issued
Array ( [id] => 12953476 [patent_doc_number] => 09837302 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-05 [patent_title] => Methods of forming a device having semiconductor devices on two sides of a buried dielectric layer [patent_app_type] => utility [patent_app_number] => 15/249112 [patent_app_country] => US [patent_app_date] => 2016-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10180 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15249112 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/249112
Methods of forming a device having semiconductor devices on two sides of a buried dielectric layer Aug 25, 2016 Issued
Array ( [id] => 11701691 [patent_doc_number] => 09691614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-27 [patent_title] => 'Methods of forming different sized patterns' [patent_app_type] => utility [patent_app_number] => 15/242903 [patent_app_country] => US [patent_app_date] => 2016-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 10683 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15242903 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/242903
Methods of forming different sized patterns Aug 21, 2016 Issued
Array ( [id] => 16332213 [patent_doc_number] => 20200303179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => METHOD AND APPARATUS FOR MANUFACTURING VAPOR DEPOSITION MASK [patent_app_type] => utility [patent_app_number] => 16/089399 [patent_app_country] => US [patent_app_date] => 2016-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16089399 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/089399
Method and apparatus for manufacturing vapor deposition mask Jul 27, 2016 Issued
Array ( [id] => 11660204 [patent_doc_number] => 09673216 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-06 [patent_title] => 'Method of forming memory cell film' [patent_app_type] => utility [patent_app_number] => 15/212682 [patent_app_country] => US [patent_app_date] => 2016-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 11646 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15212682 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/212682
Method of forming memory cell film Jul 17, 2016 Issued
Array ( [id] => 11660290 [patent_doc_number] => 09673304 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-06-06 [patent_title] => 'Methods and apparatus for vertical bit line structures in three-dimensional nonvolatile memory' [patent_app_type] => utility [patent_app_number] => 15/210915 [patent_app_country] => US [patent_app_date] => 2016-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 42 [patent_no_of_words] => 11119 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210915 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/210915
Methods and apparatus for vertical bit line structures in three-dimensional nonvolatile memory Jul 14, 2016 Issued
Array ( [id] => 11578579 [patent_doc_number] => 09633850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-25 [patent_title] => 'Masking methods for ALD processes for electrode-based devices' [patent_app_type] => utility [patent_app_number] => 15/210095 [patent_app_country] => US [patent_app_date] => 2016-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 3949 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210095 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/210095
Masking methods for ALD processes for electrode-based devices Jul 13, 2016 Issued
Array ( [id] => 11883765 [patent_doc_number] => 09754946 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-05 [patent_title] => 'Methods of forming an elevationally extending conductor laterally between a pair of conductive lines' [patent_app_type] => utility [patent_app_number] => 15/210511 [patent_app_country] => US [patent_app_date] => 2016-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 109 [patent_no_of_words] => 9210 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210511 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/210511
Methods of forming an elevationally extending conductor laterally between a pair of conductive lines Jul 13, 2016 Issued
Array ( [id] => 11615444 [patent_doc_number] => 09653307 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-16 [patent_title] => 'Surface modification compositions, methods of modifying silicon-based materials, and methods of forming high aspect ratio structures' [patent_app_type] => utility [patent_app_number] => 15/210249 [patent_app_country] => US [patent_app_date] => 2016-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6214 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210249 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/210249
Surface modification compositions, methods of modifying silicon-based materials, and methods of forming high aspect ratio structures Jul 13, 2016 Issued
Array ( [id] => 11404772 [patent_doc_number] => 20170025310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/210260 [patent_app_country] => US [patent_app_date] => 2016-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7047 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210260 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/210260
Method for manufacturing semiconductor device Jul 13, 2016 Issued
Array ( [id] => 11615696 [patent_doc_number] => 09653560 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-16 [patent_title] => 'Method of fabricating power MOSFET' [patent_app_type] => utility [patent_app_number] => 15/210881 [patent_app_country] => US [patent_app_date] => 2016-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 5732 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210881 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/210881
Method of fabricating power MOSFET Jul 13, 2016 Issued
Array ( [id] => 11925549 [patent_doc_number] => 09793135 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-17 [patent_title] => 'Method of cyclic dry etching using etchant film' [patent_app_type] => utility [patent_app_number] => 15/210256 [patent_app_country] => US [patent_app_date] => 2016-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 7201 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210256 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/210256
Method of cyclic dry etching using etchant film Jul 13, 2016 Issued
Array ( [id] => 13043385 [patent_doc_number] => 10043834 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-07 [patent_title] => Broken line repair method of TFT substrate [patent_app_type] => utility [patent_app_number] => 15/117452 [patent_app_country] => US [patent_app_date] => 2016-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 4658 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15117452 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/117452
Broken line repair method of TFT substrate Jun 19, 2016 Issued
Array ( [id] => 11578734 [patent_doc_number] => 09634004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-25 [patent_title] => 'Forming reliable contacts on tight semiconductor pitch' [patent_app_type] => utility [patent_app_number] => 15/181992 [patent_app_country] => US [patent_app_date] => 2016-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3566 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15181992 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/181992
Forming reliable contacts on tight semiconductor pitch Jun 13, 2016 Issued
Array ( [id] => 12872830 [patent_doc_number] => 20180182785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => A METHOD FOR MANUFACTURING LTPS ARRAY SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/323978 [patent_app_country] => US [patent_app_date] => 2016-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15323978 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/323978
Method for manufacturing LTPS array substrate Jun 11, 2016 Issued
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