Search

Gerald R. Ewoldt

Examiner (ID: 11995, Phone: (571)272-0843 , Office: P/1644 )

Most Active Art Unit
1644
Art Unit(s)
1644
Total Applications
1060
Issued Applications
256
Pending Applications
142
Abandoned Applications
661

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11315456 [patent_doc_number] => 20160351566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'METHOD FOR FORMING SOURCE/DRAIN CONTACTS DURING CMOS INTEGRATION USING CONFINED EPITAXIAL GROWTH TECHNIQUES AND THE RESULTING SEMICONDUCTOR DEVICES' [patent_app_type] => utility [patent_app_number] => 15/175540 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 15249 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175540 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175540
Method for forming source/drain contacts during CMOS integration using confined epitaxial growth techniques and the resulting semiconductor devices Jun 6, 2016 Issued
Array ( [id] => 11079190 [patent_doc_number] => 20160276154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'CUT LAST SELF-ALIGNED LITHO-ETCH PATTERNING' [patent_app_type] => utility [patent_app_number] => 15/170090 [patent_app_country] => US [patent_app_date] => 2016-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15170090 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/170090
Cut last self-aligned litho-etch patterning May 31, 2016 Issued
Array ( [id] => 11079320 [patent_doc_number] => 20160276285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'Method for Forming Alignment Marks and Structure of Same' [patent_app_type] => utility [patent_app_number] => 15/165834 [patent_app_country] => US [patent_app_date] => 2016-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4177 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15165834 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/165834
Method for forming alignment marks and structure of same May 25, 2016 Issued
Array ( [id] => 11453522 [patent_doc_number] => 09577177 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-21 [patent_title] => 'System and method for fabricating super conducting circuitry on both sides of an ultra-thin layer' [patent_app_type] => utility [patent_app_number] => 15/164365 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2706 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15164365 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/164365
System and method for fabricating super conducting circuitry on both sides of an ultra-thin layer May 24, 2016 Issued
Array ( [id] => 11578849 [patent_doc_number] => 09634118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-25 [patent_title] => 'Methods of forming semiconductor devices' [patent_app_type] => utility [patent_app_number] => 15/164160 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 42 [patent_no_of_words] => 15998 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15164160 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/164160
Methods of forming semiconductor devices May 24, 2016 Issued
Array ( [id] => 11339726 [patent_doc_number] => 20160365482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'METHOD FOR MANUFACTURING HIGH VOLTAGE LED FLIP CHIP' [patent_app_type] => utility [patent_app_number] => 15/164807 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11080 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15164807 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/164807
Method for manufacturing high voltage LED flip chip May 24, 2016 Issued
Array ( [id] => 11495369 [patent_doc_number] => 20170069553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'MICROWAVE PROBE, PLASMA MONITORING SYSTEM INCLUDING THE MICROWAVE PROBE, AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING THE SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/163876 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 16274 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163876 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163876
Microwave probe, plasma monitoring system including the microwave probe, and method for fabricating semiconductor device using the system May 24, 2016 Issued
Array ( [id] => 11432265 [patent_doc_number] => 09570592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Method of forming split gate memory cells with 5 volt logic devices' [patent_app_type] => utility [patent_app_number] => 15/164796 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 69 [patent_no_of_words] => 3287 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15164796 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/164796
Method of forming split gate memory cells with 5 volt logic devices May 24, 2016 Issued
Array ( [id] => 11483253 [patent_doc_number] => 09589807 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-07 [patent_title] => 'Method for eliminating interlayer dielectric dishing and controlling gate height uniformity' [patent_app_type] => utility [patent_app_number] => 15/164146 [patent_app_country] => US [patent_app_date] => 2016-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2330 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15164146 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/164146
Method for eliminating interlayer dielectric dishing and controlling gate height uniformity May 24, 2016 Issued
Array ( [id] => 11315531 [patent_doc_number] => 20160351641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'METHOD FOR MANUFACTURING DISPLAY DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/163072 [patent_app_country] => US [patent_app_date] => 2016-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 36786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163072 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163072
Method for manufacturing display device and method for manufacturing electronic device May 23, 2016 Issued
Array ( [id] => 11315531 [patent_doc_number] => 20160351641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'METHOD FOR MANUFACTURING DISPLAY DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/163072 [patent_app_country] => US [patent_app_date] => 2016-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 36786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163072 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163072
Method for manufacturing display device and method for manufacturing electronic device May 23, 2016 Issued
Array ( [id] => 11417489 [patent_doc_number] => 09564322 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-07 [patent_title] => 'Method of excimer laser annealing' [patent_app_type] => utility [patent_app_number] => 15/163346 [patent_app_country] => US [patent_app_date] => 2016-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 7449 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163346 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163346
Method of excimer laser annealing May 23, 2016 Issued
Array ( [id] => 11339720 [patent_doc_number] => 20160365477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'METHOD OF MAKING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/163173 [patent_app_country] => US [patent_app_date] => 2016-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3423 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163173 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163173
Method of making a semiconductor device May 23, 2016 Issued
Array ( [id] => 11315531 [patent_doc_number] => 20160351641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'METHOD FOR MANUFACTURING DISPLAY DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/163072 [patent_app_country] => US [patent_app_date] => 2016-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 36786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163072 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163072
Method for manufacturing display device and method for manufacturing electronic device May 23, 2016 Issued
Array ( [id] => 11315531 [patent_doc_number] => 20160351641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'METHOD FOR MANUFACTURING DISPLAY DEVICE AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/163072 [patent_app_country] => US [patent_app_date] => 2016-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 36786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163072 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163072
Method for manufacturing display device and method for manufacturing electronic device May 23, 2016 Issued
Array ( [id] => 11876652 [patent_doc_number] => 09748434 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-29 [patent_title] => 'Systems, method and apparatus for curing conductive paste' [patent_app_type] => utility [patent_app_number] => 15/163543 [patent_app_country] => US [patent_app_date] => 2016-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 10065 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163543 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163543
Systems, method and apparatus for curing conductive paste May 23, 2016 Issued
Array ( [id] => 11883719 [patent_doc_number] => 09754900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-05 [patent_title] => 'Thermosetting adhesive sheet and semiconductor device manufacturing method' [patent_app_type] => utility [patent_app_number] => 15/163200 [patent_app_country] => US [patent_app_date] => 2016-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 11757 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15163200 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/163200
Thermosetting adhesive sheet and semiconductor device manufacturing method May 23, 2016 Issued
Array ( [id] => 11057346 [patent_doc_number] => 20160254308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'Solid-State Image Pickup Device and Method of Manufacturing Same' [patent_app_type] => utility [patent_app_number] => 15/154331 [patent_app_country] => US [patent_app_date] => 2016-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 17035 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15154331 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/154331
Solid-state image pickup device and method of manufacturing same May 12, 2016 Issued
Array ( [id] => 12778804 [patent_doc_number] => 20180151436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => DIRECT BONDING METHOD [patent_app_type] => utility [patent_app_number] => 15/573699 [patent_app_country] => US [patent_app_date] => 2016-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15573699 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/573699
Direct bonding method May 11, 2016 Issued
Array ( [id] => 11847693 [patent_doc_number] => 09735252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => 'V-shaped SiGe recess volume trim for improved device performance and layout dependence' [patent_app_type] => utility [patent_app_number] => 15/151663 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3891 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151663 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151663
V-shaped SiGe recess volume trim for improved device performance and layout dependence May 10, 2016 Issued
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