Search

Gerard T. Higgins

Examiner (ID: 18981)

Most Active Art Unit
1785
Art Unit(s)
1785, 1796, 1759, 4174, 1794
Total Applications
1018
Issued Applications
552
Pending Applications
98
Abandoned Applications
380

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9191575 [patent_doc_number] => 20130330890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH OFFSET SIDEWALL STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/964849 [patent_app_country] => US [patent_app_date] => 2013-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12205 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13964849 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/964849
Method of manufacturing semiconductor device with offset sidewall structure Aug 11, 2013 Issued
Array ( [id] => 10537462 [patent_doc_number] => 09263095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Memory having buried digit lines and methods of making the same' [patent_app_type] => utility [patent_app_number] => 13/953495 [patent_app_country] => US [patent_app_date] => 2013-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5514 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13953495 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/953495
Memory having buried digit lines and methods of making the same Jul 28, 2013 Issued
Array ( [id] => 9148401 [patent_doc_number] => 20130302925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'THIN FILM TRANSISTOR SUBSTRATE FOR LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/944485 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 14009 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13944485 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/944485
Method of manufacturing a liquid crystal display device with aluminum complex oxide layer Jul 16, 2013 Issued
Array ( [id] => 9796641 [patent_doc_number] => 20150008585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-08 [patent_title] => 'MULTIPLE-PATTERNED SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/933488 [patent_app_country] => US [patent_app_date] => 2013-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5987 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13933488 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/933488
Semiconductor device with distinct multiple-patterned conductive tracks on a same level Jul 1, 2013 Issued
Array ( [id] => 10294343 [patent_doc_number] => 20150179342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-25 [patent_title] => 'CONDUCTIVE PORTIONS IN INSULATING MATERIALS' [patent_app_type] => utility [patent_app_number] => 14/408899 [patent_app_country] => US [patent_app_date] => 2013-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3555 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14408899 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/408899
Forming conductive portions in insulating materials matreials using an ion beam Jun 20, 2013 Issued
Array ( [id] => 10831986 [patent_doc_number] => 08860158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-14 [patent_title] => 'High speed STT-MRAM with orthogonal pinned layer' [patent_app_type] => utility [patent_app_number] => 13/921481 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 7713 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921481 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/921481
High speed STT-MRAM with orthogonal pinned layer Jun 18, 2013 Issued
Array ( [id] => 9905850 [patent_doc_number] => 20150061050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'MAGNETIC RANDOM ACCESS MEMORY WITH SWITABLE SWITCHING ASSIST LAYER' [patent_app_type] => utility [patent_app_number] => 13/921549 [patent_app_country] => US [patent_app_date] => 2013-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8406 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921549 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/921549
Magnetic random access memory with switchable switching assist layer Jun 18, 2013 Issued
Array ( [id] => 9367370 [patent_doc_number] => 20140077243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'LIGHT EMITTING DIODE LIGHT SOURCE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/900554 [patent_app_country] => US [patent_app_date] => 2013-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1037 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900554 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/900554
LIGHT EMITTING DIODE LIGHT SOURCE DEVICE May 22, 2013 Abandoned
Array ( [id] => 10047412 [patent_doc_number] => 09087817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-21 [patent_title] => 'Semiconductor device including a gate wiring connected to at least one semiconductor chip' [patent_app_type] => utility [patent_app_number] => 13/901103 [patent_app_country] => US [patent_app_date] => 2013-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6170 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13901103 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/901103
Semiconductor device including a gate wiring connected to at least one semiconductor chip May 22, 2013 Issued
Array ( [id] => 9178349 [patent_doc_number] => 20130320334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/900894 [patent_app_country] => US [patent_app_date] => 2013-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 23659 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900894 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/900894
Semiconductor device including oxide semiconductor stack with different ratio of indium and gallium May 22, 2013 Issued
Array ( [id] => 9557841 [patent_doc_number] => 20140175553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'MOS SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/901454 [patent_app_country] => US [patent_app_date] => 2013-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3149 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13901454 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/901454
MOS SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME May 22, 2013 Abandoned
Array ( [id] => 9951722 [patent_doc_number] => 09000515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-07 [patent_title] => 'Super-junction trench MOSFETs with short terminations' [patent_app_type] => utility [patent_app_number] => 13/899745 [patent_app_country] => US [patent_app_date] => 2013-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4044 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13899745 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/899745
Super-junction trench MOSFETs with short terminations May 21, 2013 Issued
Array ( [id] => 9195237 [patent_doc_number] => 20130334552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'SEMICONDUCTOR LIGHT EMITTING ELEMENT, AND LIGHT EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/900268 [patent_app_country] => US [patent_app_date] => 2013-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7435 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900268 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/900268
Semiconductor light emitting element, and light emitting device having conductive vias of first electrode structure disposed below second pad electrode of second electrode structure May 21, 2013 Issued
Array ( [id] => 9068730 [patent_doc_number] => 20130260486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'MOS Varactor Structure and Methods' [patent_app_type] => utility [patent_app_number] => 13/900423 [patent_app_country] => US [patent_app_date] => 2013-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5822 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900423 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/900423
MOS varactor optimized layout and methods May 21, 2013 Issued
Array ( [id] => 10112287 [patent_doc_number] => 09147706 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-29 [patent_title] => 'Semiconductor device having sensor circuit having amplifier circuit' [patent_app_type] => utility [patent_app_number] => 13/898716 [patent_app_country] => US [patent_app_date] => 2013-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 10907 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898716 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/898716
Semiconductor device having sensor circuit having amplifier circuit May 20, 2013 Issued
Array ( [id] => 9608064 [patent_doc_number] => 08785229 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-07-22 [patent_title] => 'Methods of forming micro-electromechanical resonators having passive temperature compensation regions therein' [patent_app_type] => utility [patent_app_number] => 13/898999 [patent_app_country] => US [patent_app_date] => 2013-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 4566 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898999 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/898999
Methods of forming micro-electromechanical resonators having passive temperature compensation regions therein May 20, 2013 Issued
Array ( [id] => 9171704 [patent_doc_number] => 20130313689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/897613 [patent_app_country] => US [patent_app_date] => 2013-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7845 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897613 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/897613
Through silicon via in semiconductor device May 19, 2013 Issued
Array ( [id] => 9823948 [patent_doc_number] => 08933434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-13 [patent_title] => 'Elemental semiconductor material contact for GaN-based light emitting diodes' [patent_app_type] => utility [patent_app_number] => 13/897508 [patent_app_country] => US [patent_app_date] => 2013-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 28 [patent_no_of_words] => 10209 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897508 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/897508
Elemental semiconductor material contact for GaN-based light emitting diodes May 19, 2013 Issued
Array ( [id] => 9178347 [patent_doc_number] => 20130320332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/897502 [patent_app_country] => US [patent_app_date] => 2013-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 24816 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897502 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/897502
Method for manufacturing semiconductor device comprising oxide semiconductor layer May 19, 2013 Issued
Array ( [id] => 10936618 [patent_doc_number] => 20140339639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'MULTI-DIRECTION WIRING FOR REPLACEMENT GATE LINES' [patent_app_type] => utility [patent_app_number] => 13/897568 [patent_app_country] => US [patent_app_date] => 2013-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 5756 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897568 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/897568
Multi-direction wiring for replacement gate lines May 19, 2013 Issued
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