Search

Gerard T. Higgins

Examiner (ID: 10068, Phone: (571)270-3467 , Office: P/1785 )

Most Active Art Unit
1785
Art Unit(s)
1759, 1794, 1785, 4174, 1796
Total Applications
1010
Issued Applications
548
Pending Applications
96
Abandoned Applications
379

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2422551 [patent_doc_number] => 04744045 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-10 [patent_title] => 'Divider circuit for encoded PCM samples' [patent_app_type] => 1 [patent_app_number] => 6/687874 [patent_app_country] => US [patent_app_date] => 1984-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5095 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/744/04744045.pdf [firstpage_image] =>[orig_patent_app_number] => 687874 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/687874
Divider circuit for encoded PCM samples Dec 30, 1984 Issued
Array ( [id] => 2321895 [patent_doc_number] => 04716539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-29 [patent_title] => 'Multiplier circuit for encoder PCM samples' [patent_app_type] => 1 [patent_app_number] => 6/687875 [patent_app_country] => US [patent_app_date] => 1984-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 4634 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/716/04716539.pdf [firstpage_image] =>[orig_patent_app_number] => 687875 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/687875
Multiplier circuit for encoder PCM samples Dec 30, 1984 Issued
Array ( [id] => 2332688 [patent_doc_number] => 04698771 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-10-06 [patent_title] => 'Adder circuit for encoded PCM samples' [patent_app_type] => 1 [patent_app_number] => 6/687877 [patent_app_country] => US [patent_app_date] => 1984-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7882 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 585 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/698/04698771.pdf [firstpage_image] =>[orig_patent_app_number] => 687877 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/687877
Adder circuit for encoded PCM samples Dec 30, 1984 Issued
Array ( [id] => 2321882 [patent_doc_number] => 04716538 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-29 [patent_title] => 'Multiply/divide circuit for encoder PCM samples' [patent_app_type] => 1 [patent_app_number] => 6/687892 [patent_app_country] => US [patent_app_date] => 1984-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5819 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 406 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/716/04716538.pdf [firstpage_image] =>[orig_patent_app_number] => 687892 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/687892
Multiply/divide circuit for encoder PCM samples Dec 30, 1984 Issued
Array ( [id] => 2309886 [patent_doc_number] => 04691293 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-01 [patent_title] => 'High frequency, wide range FIR filter' [patent_app_type] => 1 [patent_app_number] => 6/687088 [patent_app_country] => US [patent_app_date] => 1984-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 3096 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/691/04691293.pdf [firstpage_image] =>[orig_patent_app_number] => 687088 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/687088
High frequency, wide range FIR filter Dec 27, 1984 Issued
Array ( [id] => 2452218 [patent_doc_number] => 04751663 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-06-14 [patent_title] => 'IIR digital filter' [patent_app_type] => 1 [patent_app_number] => 6/685127 [patent_app_country] => US [patent_app_date] => 1984-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2650 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/751/04751663.pdf [firstpage_image] =>[orig_patent_app_number] => 685127 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/685127
IIR digital filter Dec 20, 1984 Issued
Array ( [id] => 2365015 [patent_doc_number] => 04694414 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-15 [patent_title] => 'Digital delay interpolation filter with amplitude and phase compensation' [patent_app_type] => 1 [patent_app_number] => 6/683678 [patent_app_country] => US [patent_app_date] => 1984-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 5312 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/694/04694414.pdf [firstpage_image] =>[orig_patent_app_number] => 683678 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/683678
Digital delay interpolation filter with amplitude and phase compensation Dec 18, 1984 Issued
Array ( [id] => 2355616 [patent_doc_number] => 04704701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-11-03 [patent_title] => 'Conditional carry adder for a multibit digital computer' [patent_app_type] => 1 [patent_app_number] => 6/667198 [patent_app_country] => US [patent_app_date] => 1984-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2091 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 772 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/704/04704701.pdf [firstpage_image] =>[orig_patent_app_number] => 667198 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/667198
Conditional carry adder for a multibit digital computer Oct 31, 1984 Issued
Array ( [id] => 2317210 [patent_doc_number] => 04675838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-23 [patent_title] => 'Conditional-carry adder for multibit digital computer' [patent_app_type] => 1 [patent_app_number] => 6/667199 [patent_app_country] => US [patent_app_date] => 1984-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2696 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/675/04675838.pdf [firstpage_image] =>[orig_patent_app_number] => 667199 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/667199
Conditional-carry adder for multibit digital computer Oct 31, 1984 Issued
Array ( [id] => 2298329 [patent_doc_number] => 04710892 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-12-01 [patent_title] => 'Phase calculation circuitry in digital television receiver' [patent_app_type] => 1 [patent_app_number] => 6/666020 [patent_app_country] => US [patent_app_date] => 1984-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4301 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/710/04710892.pdf [firstpage_image] =>[orig_patent_app_number] => 666020 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/666020
Phase calculation circuitry in digital television receiver Oct 28, 1984 Issued
Array ( [id] => 2501834 [patent_doc_number] => 04825398 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-04-25 [patent_title] => 'Method and apparatus for converting an input scanning sequence into an output scanning sequence' [patent_app_type] => 1 [patent_app_number] => 6/658776 [patent_app_country] => US [patent_app_date] => 1984-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5590 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/825/04825398.pdf [firstpage_image] =>[orig_patent_app_number] => 658776 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/658776
Method and apparatus for converting an input scanning sequence into an output scanning sequence Oct 8, 1984 Issued
Array ( [id] => 2355460 [patent_doc_number] => 04692889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-09-08 [patent_title] => 'Circuitry for calculating magnitude of vector sum from its orthogonal components in digital television receiver' [patent_app_type] => 1 [patent_app_number] => 6/655657 [patent_app_country] => US [patent_app_date] => 1984-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2602 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/692/04692889.pdf [firstpage_image] =>[orig_patent_app_number] => 655657 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/655657
Circuitry for calculating magnitude of vector sum from its orthogonal components in digital television receiver Sep 27, 1984 Issued
Array ( [id] => 2624048 [patent_doc_number] => 04943940 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-07-24 [patent_title] => 'Floating point add/subtract and multiplying assemblies sharing common normalization, rounding and exponential apparatus' [patent_app_type] => 1 [patent_app_number] => 6/655482 [patent_app_country] => US [patent_app_date] => 1984-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2830 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/943/04943940.pdf [firstpage_image] =>[orig_patent_app_number] => 655482 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/655482
Floating point add/subtract and multiplying assemblies sharing common normalization, rounding and exponential apparatus Sep 26, 1984 Issued
Array ( [id] => 2422849 [patent_doc_number] => 04742520 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-05-03 [patent_title] => 'ALU operation: modulo two sum' [patent_app_type] => 1 [patent_app_number] => 6/654819 [patent_app_country] => US [patent_app_date] => 1984-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2230 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/742/04742520.pdf [firstpage_image] =>[orig_patent_app_number] => 654819 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/654819
ALU operation: modulo two sum Sep 25, 1984 Issued
Array ( [id] => 2309457 [patent_doc_number] => 04644491 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-02-17 [patent_title] => 'Sign generation system for a carry save adder' [patent_app_type] => 1 [patent_app_number] => 6/653053 [patent_app_country] => US [patent_app_date] => 1984-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2103 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/644/04644491.pdf [firstpage_image] =>[orig_patent_app_number] => 653053 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/653053
Sign generation system for a carry save adder Sep 20, 1984 Issued
Array ( [id] => 2397523 [patent_doc_number] => 04794556 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1988-12-27 [patent_title] => 'Method and apparatus for sampling in-phase and quadrature components' [patent_app_type] => 1 [patent_app_number] => 6/652297 [patent_app_country] => US [patent_app_date] => 1984-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 6269 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/794/04794556.pdf [firstpage_image] =>[orig_patent_app_number] => 652297 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/652297
Method and apparatus for sampling in-phase and quadrature components Sep 18, 1984 Issued
Array ( [id] => 2320911 [patent_doc_number] => 04700324 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-10-13 [patent_title] => 'Digital circuit performing an arithmetic operation with an overflow' [patent_app_type] => 1 [patent_app_number] => 6/647507 [patent_app_country] => US [patent_app_date] => 1984-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4860 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/700/04700324.pdf [firstpage_image] =>[orig_patent_app_number] => 647507 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/647507
Digital circuit performing an arithmetic operation with an overflow Sep 4, 1984 Issued
Array ( [id] => 2328414 [patent_doc_number] => 04670853 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-06-02 [patent_title] => 'Coupon computer and method for handling coupons' [patent_app_type] => 1 [patent_app_number] => 6/646848 [patent_app_country] => US [patent_app_date] => 1984-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 1836 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/670/04670853.pdf [firstpage_image] =>[orig_patent_app_number] => 646848 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/646848
Coupon computer and method for handling coupons Sep 3, 1984 Issued
Array ( [id] => 2318761 [patent_doc_number] => 04646321 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-02-24 [patent_title] => 'Interpolation pulse duration modulated adder' [patent_app_type] => 1 [patent_app_number] => 6/646345 [patent_app_country] => US [patent_app_date] => 1984-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 7738 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/646/04646321.pdf [firstpage_image] =>[orig_patent_app_number] => 646345 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/646345
Interpolation pulse duration modulated adder Aug 30, 1984 Issued
Array ( [id] => 2299394 [patent_doc_number] => 04660162 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-21 [patent_title] => 'Interpolation pulse duration modulated multiplier' [patent_app_type] => 1 [patent_app_number] => 6/646344 [patent_app_country] => US [patent_app_date] => 1984-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 7759 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/660/04660162.pdf [firstpage_image] =>[orig_patent_app_number] => 646344 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/646344
Interpolation pulse duration modulated multiplier Aug 30, 1984 Issued
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