Search

Gerard T. Higgins

Examiner (ID: 18981)

Most Active Art Unit
1785
Art Unit(s)
1785, 1796, 1759, 4174, 1794
Total Applications
1018
Issued Applications
552
Pending Applications
98
Abandoned Applications
380

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11386180 [patent_doc_number] => 20170012236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'OLED Display Panel and Method for Packaging the Same' [patent_app_type] => utility [patent_app_number] => 14/769794 [patent_app_country] => US [patent_app_date] => 2015-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3757 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14769794 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/769794
Method for packaging the OLED display panel using screen printing Jul 21, 2015 Issued
Array ( [id] => 11116646 [patent_doc_number] => 20160313620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'GOA CIRCUIT REPAIR METHOD' [patent_app_type] => utility [patent_app_number] => 14/761306 [patent_app_country] => US [patent_app_date] => 2015-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8515 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14761306 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/761306
Gate driver on array circuit repair method Jun 22, 2015 Issued
Array ( [id] => 10410122 [patent_doc_number] => 20150295131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'SEMICONDUCTOR OPTICAL DEVICE AND ITS MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 14/747862 [patent_app_country] => US [patent_app_date] => 2015-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4488 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14747862 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/747862
Manufacture method of making semiconductor optical device Jun 22, 2015 Issued
Array ( [id] => 10394842 [patent_doc_number] => 20150279848 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/735179 [patent_app_country] => US [patent_app_date] => 2015-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 113 [patent_figures_cnt] => 113 [patent_no_of_words] => 21737 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14735179 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/735179
Non-volatile memory cell in semiconductor device Jun 9, 2015 Issued
Array ( [id] => 11391817 [patent_doc_number] => 09553068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-24 [patent_title] => 'Integrated circuit (“IC”) assembly includes an IC die with a top metallization layer and a conductive epoxy layer applied to the top metallization layer' [patent_app_type] => utility [patent_app_number] => 14/725377 [patent_app_country] => US [patent_app_date] => 2015-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3094 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14725377 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/725377
Integrated circuit (“IC”) assembly includes an IC die with a top metallization layer and a conductive epoxy layer applied to the top metallization layer May 28, 2015 Issued
Array ( [id] => 11315480 [patent_doc_number] => 20160351590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-01 [patent_title] => 'PREVENTING STRAINED FIN RELAXATION' [patent_app_type] => utility [patent_app_number] => 14/722237 [patent_app_country] => US [patent_app_date] => 2015-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6239 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722237 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/722237
Preventing strained fin relaxation by sealing fin ends May 26, 2015 Issued
Array ( [id] => 10758672 [patent_doc_number] => 20160104824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-14 [patent_title] => 'SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/722720 [patent_app_country] => US [patent_app_date] => 2015-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 15088 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722720 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/722720
SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME May 26, 2015 Abandoned
Array ( [id] => 10638494 [patent_doc_number] => 09356005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-31 [patent_title] => 'Package of light emitting diode with heat sink' [patent_app_type] => utility [patent_app_number] => 14/722763 [patent_app_country] => US [patent_app_date] => 2015-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 32 [patent_no_of_words] => 8034 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722763 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/722763
Package of light emitting diode with heat sink May 26, 2015 Issued
Array ( [id] => 10463951 [patent_doc_number] => 20150348966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'FIN FIELD-EFFCT TRANSISTORS AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/722671 [patent_app_country] => US [patent_app_date] => 2015-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722671 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/722671
Fin field-effect transistors and fabrication method thereof May 26, 2015 Issued
Array ( [id] => 10508421 [patent_doc_number] => 09236298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-12 [patent_title] => 'Methods for fabrication interconnect structures with functional components and electrical conductive contact structures on a same level' [patent_app_type] => utility [patent_app_number] => 14/717387 [patent_app_country] => US [patent_app_date] => 2015-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 8040 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14717387 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/717387
Methods for fabrication interconnect structures with functional components and electrical conductive contact structures on a same level May 19, 2015 Issued
Array ( [id] => 10674151 [patent_doc_number] => 20160020296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'HETEROJUNCTION SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 14/714927 [patent_app_country] => US [patent_app_date] => 2015-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5390 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14714927 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/714927
Heterojunction semiconductor device and manufacturing method May 17, 2015 Issued
Array ( [id] => 11765256 [patent_doc_number] => 09373707 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-21 [patent_title] => 'Manufacturing method of semiconductor device with steps of heat treatment in nitrogen containing atmosphere, oxygen doping treatment and heat treatment in oxygen containing atmosphere' [patent_app_type] => utility [patent_app_number] => 14/710675 [patent_app_country] => US [patent_app_date] => 2015-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 49 [patent_no_of_words] => 29687 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14710675 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/710675
Manufacturing method of semiconductor device with steps of heat treatment in nitrogen containing atmosphere, oxygen doping treatment and heat treatment in oxygen containing atmosphere May 12, 2015 Issued
Array ( [id] => 10358651 [patent_doc_number] => 20150243656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/708758 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 14673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14708758 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/708758
Semiconductor device May 10, 2015 Issued
Array ( [id] => 10358620 [patent_doc_number] => 20150243625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'JOINING A CHIP TO A SUBSTRATE WITH SOLDER ALLOYS HAVING DIFFERENT REFLOW TEMPERATURES' [patent_app_type] => utility [patent_app_number] => 14/708350 [patent_app_country] => US [patent_app_date] => 2015-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3447 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14708350 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/708350
JOINING A CHIP TO A SUBSTRATE WITH SOLDER ALLOYS HAVING DIFFERENT REFLOW TEMPERATURES May 10, 2015 Abandoned
Array ( [id] => 10604245 [patent_doc_number] => 09324815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/702070 [patent_app_country] => US [patent_app_date] => 2015-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 62 [patent_no_of_words] => 21284 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14702070 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/702070
Semiconductor device Apr 30, 2015 Issued
Array ( [id] => 10551459 [patent_doc_number] => 09276091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/688199 [patent_app_country] => US [patent_app_date] => 2015-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 70 [patent_no_of_words] => 24816 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14688199 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/688199
Semiconductor device and method for manufacturing the same Apr 15, 2015 Issued
Array ( [id] => 11116644 [patent_doc_number] => 20160313619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'ARRAY SUBSTRATE AND METHOD OF REPAIRING BROKEN LINES THEREFOR' [patent_app_type] => utility [patent_app_number] => 14/758807 [patent_app_country] => US [patent_app_date] => 2015-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2510 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14758807 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/758807
Array substrate and method of repairing broken lines therefor Mar 31, 2015 Issued
Array ( [id] => 11321680 [patent_doc_number] => 09520429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-13 [patent_title] => 'Image sensor with protection layer having convex-shaped portions over the air spacers between the plurality of filters' [patent_app_type] => utility [patent_app_number] => 14/663146 [patent_app_country] => US [patent_app_date] => 2015-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4190 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14663146 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/663146
Image sensor with protection layer having convex-shaped portions over the air spacers between the plurality of filters Mar 18, 2015 Issued
Array ( [id] => 10309427 [patent_doc_number] => 20150194428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-09 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH OFFSET SIDEWALL STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/662276 [patent_app_country] => US [patent_app_date] => 2015-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12291 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14662276 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/662276
Method of manufacturing semiconductor device with offset sidewall structure Mar 18, 2015 Issued
Array ( [id] => 11333785 [patent_doc_number] => 09525036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-20 [patent_title] => 'Semiconductor device having gate electrode with spacers on fin structure and silicide layer filling the recess' [patent_app_type] => utility [patent_app_number] => 14/662697 [patent_app_country] => US [patent_app_date] => 2015-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 8793 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14662697 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/662697
Semiconductor device having gate electrode with spacers on fin structure and silicide layer filling the recess Mar 18, 2015 Issued
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