
Getente A. Yimer
Examiner (ID: 16342, Phone: (571)270-7106 , Office: P/2181 )
| Most Active Art Unit | 2181 |
| Art Unit(s) | 2181 |
| Total Applications | 683 |
| Issued Applications | 574 |
| Pending Applications | 65 |
| Abandoned Applications | 72 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16918798
[patent_doc_number] => 20210191890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-24
[patent_title] => SYSTEM DIRECT MEMORY ACCESS ENGINE OFFLOAD
[patent_app_type] => utility
[patent_app_number] => 16/723709
[patent_app_country] => US
[patent_app_date] => 2019-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4724
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723709
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/723709 | System direct memory access engine offload | Dec 19, 2019 | Issued |
Array
(
[id] => 16592662
[patent_doc_number] => 10901925
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-01-26
[patent_title] => Configurable input / output connector in a camera
[patent_app_type] => utility
[patent_app_number] => 16/715644
[patent_app_country] => US
[patent_app_date] => 2019-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4261
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16715644
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/715644 | Configurable input / output connector in a camera | Dec 15, 2019 | Issued |
Array
(
[id] => 16078183
[patent_doc_number] => 20200193078
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-18
[patent_title] => OPTIMIZED ALLOCATION OF FUNCTIONS IN HYBRID MOTOR CONTROLLER IMPLEMENTATIONS
[patent_app_type] => utility
[patent_app_number] => 16/710010
[patent_app_country] => US
[patent_app_date] => 2019-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9312
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710010
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/710010 | Optimized allocation of functions in hybrid motor controller implementations | Dec 10, 2019 | Issued |
Array
(
[id] => 18592447
[patent_doc_number] => 11741350
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-29
[patent_title] => Efficient utilization of processing element array
[patent_app_type] => utility
[patent_app_number] => 16/698461
[patent_app_country] => US
[patent_app_date] => 2019-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 27
[patent_no_of_words] => 26623
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698461
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/698461 | Efficient utilization of processing element array | Nov 26, 2019 | Issued |
Array
(
[id] => 17238434
[patent_doc_number] => 11182314
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-11-23
[patent_title] => Low latency neural network model loading
[patent_app_type] => utility
[patent_app_number] => 16/698761
[patent_app_country] => US
[patent_app_date] => 2019-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 12758
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698761
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/698761 | Low latency neural network model loading | Nov 26, 2019 | Issued |
Array
(
[id] => 15654987
[patent_doc_number] => 20200090024
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-19
[patent_title] => DATA SHARING SYSTEM AND DATA SHARING METHOD THERFOR
[patent_app_type] => utility
[patent_app_number] => 16/693956
[patent_app_country] => US
[patent_app_date] => 2019-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11948
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693956
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/693956 | Data sharing system and data sharing method therefor | Nov 24, 2019 | Issued |
Array
(
[id] => 17017167
[patent_doc_number] => 11086808
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-10
[patent_title] => Direct memory access (DMA) commands for noncontiguous source and destination memory addresses
[patent_app_type] => utility
[patent_app_number] => 16/694942
[patent_app_country] => US
[patent_app_date] => 2019-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9304
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16694942
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/694942 | Direct memory access (DMA) commands for noncontiguous source and destination memory addresses | Nov 24, 2019 | Issued |
Array
(
[id] => 16844834
[patent_doc_number] => 11016923
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-05-25
[patent_title] => Configuring hot-inserted device via management controller
[patent_app_type] => utility
[patent_app_number] => 16/692180
[patent_app_country] => US
[patent_app_date] => 2019-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4273
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16692180
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/692180 | Configuring hot-inserted device via management controller | Nov 21, 2019 | Issued |
Array
(
[id] => 17283160
[patent_doc_number] => 11200189
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-14
[patent_title] => Baseboard management controller-based security operations for hot plug capable devices
[patent_app_type] => utility
[patent_app_number] => 16/690592
[patent_app_country] => US
[patent_app_date] => 2019-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6924
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690592
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/690592 | Baseboard management controller-based security operations for hot plug capable devices | Nov 20, 2019 | Issued |
Array
(
[id] => 17151415
[patent_doc_number] => 11144493
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-10-12
[patent_title] => Composite interface circuit
[patent_app_type] => utility
[patent_app_number] => 16/686039
[patent_app_country] => US
[patent_app_date] => 2019-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 14603
[patent_no_of_claims] => 55
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 259
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16686039
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/686039 | Composite interface circuit | Nov 14, 2019 | Issued |
Array
(
[id] => 15870619
[patent_doc_number] => 20200142713
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-07
[patent_title] => RECONFIGURABLE DATA BUS SYSTEM AND METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/677301
[patent_app_country] => US
[patent_app_date] => 2019-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4452
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16677301
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/677301 | Reconfigurable data bus system and method thereof | Nov 6, 2019 | Issued |
Array
(
[id] => 16810518
[patent_doc_number] => 20210133073
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-06
[patent_title] => METHOD AND SYSTEM FOR GENERATING DIGITAL TWINS OF RESOURCE POOLS AND RESOURCE POOL DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/671537
[patent_app_country] => US
[patent_app_date] => 2019-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9192
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16671537
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/671537 | Method and system for generating digital twins of resource pools and resource pool devices | Oct 31, 2019 | Issued |
Array
(
[id] => 15837231
[patent_doc_number] => 20200133898
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-30
[patent_title] => Artificial Intelligence-Enabled Management of Storage Media Access
[patent_app_type] => utility
[patent_app_number] => 16/664528
[patent_app_country] => US
[patent_app_date] => 2019-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16986
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16664528
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/664528 | Artificial intelligence-enabled management of storage media access | Oct 24, 2019 | Issued |
Array
(
[id] => 17194948
[patent_doc_number] => 11163705
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-02
[patent_title] => Method and apparatus for partitioning memory bandwidth of system
[patent_app_type] => utility
[patent_app_number] => 16/661794
[patent_app_country] => US
[patent_app_date] => 2019-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 7830
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16661794
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/661794 | Method and apparatus for partitioning memory bandwidth of system | Oct 22, 2019 | Issued |
Array
(
[id] => 16780266
[patent_doc_number] => 20210117345
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-22
[patent_title] => MULTI-THREADED ARCHITECTURE FOR MEMORY CONTROLLER DATA PATHS
[patent_app_type] => utility
[patent_app_number] => 16/659748
[patent_app_country] => US
[patent_app_date] => 2019-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6233
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16659748
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/659748 | Multi-threaded architecture for memory controller data paths | Oct 21, 2019 | Issued |
Array
(
[id] => 17528621
[patent_doc_number] => 11301309
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-12
[patent_title] => Apparatuses, methods, and systems for processor non-write-back capabilities
[patent_app_type] => utility
[patent_app_number] => 16/586028
[patent_app_country] => US
[patent_app_date] => 2019-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 21
[patent_no_of_words] => 19494
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586028
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/586028 | Apparatuses, methods, and systems for processor non-write-back capabilities | Sep 26, 2019 | Issued |
Array
(
[id] => 17151128
[patent_doc_number] => 11144205
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-12
[patent_title] => Audio playback device and operation method of the same
[patent_app_type] => utility
[patent_app_number] => 16/585142
[patent_app_country] => US
[patent_app_date] => 2019-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2483
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585142
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/585142 | Audio playback device and operation method of the same | Sep 26, 2019 | Issued |
Array
(
[id] => 15349425
[patent_doc_number] => 20200012604
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-09
[patent_title] => System, Apparatus And Method For Processing Remote Direct Memory Access Operations With A Device-Attached Memory
[patent_app_type] => utility
[patent_app_number] => 16/575478
[patent_app_country] => US
[patent_app_date] => 2019-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7543
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16575478
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/575478 | System, apparatus and method for processing remote direct memory access operations with a device-attached memory | Sep 18, 2019 | Issued |
Array
(
[id] => 17622193
[patent_doc_number] => 11341250
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-24
[patent_title] => System and method to securely map UEFI RAMDISK using DMAR table for securely launching SOS contents
[patent_app_type] => utility
[patent_app_number] => 16/571802
[patent_app_country] => US
[patent_app_date] => 2019-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 5674
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16571802
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/571802 | System and method to securely map UEFI RAMDISK using DMAR table for securely launching SOS contents | Sep 15, 2019 | Issued |
Array
(
[id] => 16690558
[patent_doc_number] => 20210073036
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-11
[patent_title] => COMPUTATIONAL RESOURCE ALLOCATION IN ENSEMBLE MACHINE LEARNING SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 16/563776
[patent_app_country] => US
[patent_app_date] => 2019-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10556
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16563776
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/563776 | Computational resource allocation in ensemble machine learning systems | Sep 5, 2019 | Issued |